PTAB
IPR2018-00095
Samsung Electronics Co Ltd v. Ibex PT Holdings Co Ltd
Key Events
Petition
Table of Contents
petition
1. Case Identification
- Case #: IPR2018-00095
- Patent #: 8,774,279
- Filed: October 23, 2017
- Petitioner(s): Samsung Electronics Co., Ltd.
- Patent Owner(s): Ibex PT Holdings Co., Ltd.
- Challenged Claims: 1-5
2. Patent Overview
- Title: Apparatus and Method for Decoding Motion Information
- Brief Description: The ’279 patent describes an apparatus and methods for decoding video data, particularly focusing on a "merge mode" for inter-prediction. This mode allows a current block of video data to inherit motion information (e.g., motion vectors) from neighboring spatial or temporal blocks to improve coding efficiency.
3. Grounds for Unpatentability
Ground 1: Obviousness over WD4-v2, Lin, and Zhou II - Claims 1-4 are obvious over WD4-v2 in view of Lin and Zhou II.
- Prior Art Relied Upon: WD4-v2 (JCTVC-F803, version 2, a working draft of the HEVC standard), Lin (Application # 2012/0236942), and Zhou II (JCTVC-F081, version 2, an HEVC standards contribution).
- Core Argument for this Ground:
- Prior Art Mapping: Petitioner argued that WD4-v2, a foundational document for the High Efficiency Video Coding (HEVC) standard, taught nearly all limitations of independent claim 1. Specifically, WD4-v2 disclosed a video decoder that reconstructs a merge predictor index from a codeword, derives spatial merge candidates from neighboring blocks (e.g., left, upper, upper-right), and generates a temporal merge candidate. It further taught creating a merge candidate list from these candidates and selecting a final merge predictor to generate a prediction block. For the final limitation of claim 1—selecting a temporal merge candidate based on the current block's adjacency to a lower boundary of the largest coding unit (LCU)—Petitioner relied on Zhou II. Zhou II, a proposal to improve the HEVC standard, explicitly taught selecting a specific temporal candidate block (the bottom-right block) when the current block is adjacent to the LCU's lower boundary to minimize memory bandwidth. Lin was cited to demonstrate the obviousness of implementing these disclosed decoding algorithms on a general-purpose processor.
- Motivation to Combine: A POSITA would combine WD4-v2 and Zhou II because both documents were part of the same HEVC standardization effort. Zhou II was submitted as a direct proposal to improve the temporal motion vector prediction (TMVP) derivation process being developed in working drafts like WD4-v2. The stated motivation in Zhou II was to reduce memory bandwidth and coding loss, providing a clear reason to incorporate its teachings into the WD4-v2 framework. A POSITA would look to Lin as it described standard hardware implementations for video coding algorithms.
- Expectation of Success: A POSITA would have a high expectation of success, as Zhou II was an incremental improvement designed specifically for the HEVC framework and proposed methods to incorporate its disclosure into the working draft.
Ground 2: Obviousness over WD4-v2, Lin, Zhou II, and Sze - Claim 5 is obvious over WD4-v2 in view of Lin, Zhou II, and Sze.
- Prior Art Relied Upon: WD4-v2, Lin, Zhou II, and Sze (JCTVC-F129, version 3, an HEVC standards contribution).
- Core Argument for this Ground:
- Prior Art Mapping: This ground built upon the combination in Ground 1 to address the additional limitation of claim 5, which required the use of a "diagonal raster inverse scan" during the inverse-scanning process. Petitioner asserted that while WD4-v2 taught a "zigzag raster inverse scan," the Sze reference explicitly proposed replacing the traditional zigzag scan with a fixed "diagonal scan approach" for HEVC.
- Motivation to Combine: The motivation to modify the process of WD4-v2 with the teaching of Sze was improved performance and efficiency. Sze explicitly stated that using a diagonal scan improves parallel processing of coefficients and "reduces the amount of speculative computations." As Sze was also a contribution to the same HEVC standardization process, a POSITA developing an HEVC-compliant decoder would have been motivated to adopt this disclosed improvement over the existing zigzag scan method.
- Expectation of Success: A POSITA would have reasonably expected success in substituting the scan method, as Sze presented the diagonal scan as a direct and superior alternative to the zigzag scan for use in the HEVC standard, a common type of design choice modification during standards development.
4. Key Claim Construction Positions
- Petitioner argued that the various "unit" terms in the challenged claims (e.g., "merge predictor index decoding unit," "spatial merge candidate derivation unit") should be construed as means-plus-function terms under 35 U.S.C. § 112, sixth paragraph.
- The core of this argument was that the word "unit" is a nonce term that fails to recite a sufficiently definite structure. Petitioner contended that the functional language modifying each "unit" term did not impart the necessary structure to avoid means-plus-function treatment.
- For the purposes of the IPR proceeding, Petitioner adopted the position that the corresponding structure for each "unit" is a processor programmed to perform the specific algorithms disclosed in the ’279 patent's specification, while reserving the right to challenge the adequacy of that disclosure under §112 in other proceedings.
5. Relief Requested
- Petitioner requested institution of an inter partes review and cancellation of claims 1-5 of the ’279 patent as unpatentable.
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