PTAB
IPR2018-00998
Micron Technology v. North Star Innovations Inc
1. Case Identification
- Case #: IPR2018-00998
- Patent #: 6,127,875
- Filed: May 1, 2018
- Petitioner(s): Micron Technology, Inc.
- Patent Owner(s): North Star Innovations, Inc.
- Challenged Claims: 1-3
2. Patent Overview
- Title: Complimentary Double Pumping Voltage Boost Converter
- Brief Description: The ’875 patent relates to voltage boosting circuits for integrated circuits. It addresses output voltage distortion in conventional boost circuits, which suffer from significant voltage drops during the capacitor recharge phase of each clock cycle. The patent discloses a "complementary double pumping" circuit that uses two symmetric boost sub-circuits operating in opposing phases to boost the output voltage twice per clock cycle, purportedly creating a more stable and level output voltage.
3. Grounds for Unpatentability
Ground 1: Anticipation by Hsieh - Claims 1-3 are anticipated by Hsieh under 35 U.S.C. § 102(e).
- Prior Art Relied Upon: Hsieh (Patent 5,801,997).
- Core Argument for this Ground:
- Prior Art Mapping: Petitioner argued that Hsieh, a reference not cited during the ’875 patent’s prosecution, discloses every limitation of the challenged claims. Hsieh was presented as addressing the identical technical problem of voltage distortion from prior art boost circuits and teaching an identical solution, which Hsieh calls a "reciprocating or ping-pong voltage boosting circuit." Petitioner asserted this circuit uses the same complementary double-pumping architecture, components, and operational principles as claimed in the ’875 patent, thereby anticipating claims 1-3. The entire petition is dedicated to a detailed, element-by-element mapping of Hsieh’s disclosure onto these three claims.
- Claim 1 (Independent): Petitioner asserted Hsieh’s "ping-pong" circuit discloses a boost circuit with an input terminal (for power supply Vcc) and an output terminal (for boosted voltage Vh). Hsieh's pMOSFET transistor Mp5 was identified as the claimed "first switch" operated by a "first phase signal" (SEL), and transistor Mp3 was identified as the "second switch" operated by an opposite "second phase signal" (SELB), which is the inverted form of SEL. Hsieh’s capacitors C1 and C0 were mapped to the claimed first and second capacitors, respectively, each shown with a first terminal coupled to the output terminal and a second terminal coupled for receiving a common boost signal (BOOST).
- Claim 2 (Dependent): The petition argued Hsieh’s inverter INVB meets the "inverting buffer" limitation, as it receives the BOOST signal and its output is coupled to the second terminal of the first capacitor (C1) via a NOR gate. Critically, Petitioner contended that a separate circuit in Hsieh, comprising inverter INVB and NOR gate NOR0, functions as a tri-state non-inverting buffer. This circuit receives the BOOST signal and its output is coupled to the second terminal of the second capacitor (C0), meeting the "non-inverting buffer" limitation because it is enabled and disabled by the select signal SEL.
- Claim 3 (Dependent): Petitioner mapped Hsieh’s pMOSFET transistor Mp4 to the "third switch," showing it is coupled between the first terminal of the first capacitor (C1) and the output terminal, and is operated by the second phase signal (SELB). Hsieh’s transistor Mp2 was mapped to the "fourth switch," shown coupled between the first terminal of the second capacitor (C0) and the output terminal, and operated by the first phase signal (SEL).
- Prior Art Mapping: Petitioner argued that Hsieh, a reference not cited during the ’875 patent’s prosecution, discloses every limitation of the challenged claims. Hsieh was presented as addressing the identical technical problem of voltage distortion from prior art boost circuits and teaching an identical solution, which Hsieh calls a "reciprocating or ping-pong voltage boosting circuit." Petitioner asserted this circuit uses the same complementary double-pumping architecture, components, and operational principles as claimed in the ’875 patent, thereby anticipating claims 1-3. The entire petition is dedicated to a detailed, element-by-element mapping of Hsieh’s disclosure onto these three claims.
4. Key Claim Construction Positions
- "buffer," "inverting buffer," and "non-inverting buffer" (claim 2): Petitioner argued these terms should be construed based on their function as understood by a person of ordinary skill in the art (POSITA), rather than requiring a specific structure. A central contention was that the terms encompass tri-state buffers, which perform their respective logic function (e.g., inverting or non-inverting) only when an enabling signal is active. Petitioner asserted a POSITA would understand that Hsieh's combination of an inverter and a NOR gate, controlled by the SEL signal, constitutes a functional "non-inverting buffer" because when SEL enables it, the output follows the input, and when disabled, the output is fixed. This construction was essential to mapping Hsieh onto the limitations of dependent claim 2.
- "coupled to" / "coupled between" (claims 1-3): Petitioner clarified that these terms do not necessitate a direct, physical, or uninterrupted electrical connection. Citing the ’875 patent’s own use of the terms to describe components connected via switches (which can be open or closed), Petitioner argued the terms simply require that components are arranged to be operatively connected as part of the circuit's function. This interpretation was used to map Hsieh’s components, which are often connected via transistors that act as switches, to meet the "coupled" limitations of the claims.
5. Relief Requested
- Petitioner requests institution of an inter partes review (IPR) and cancellation of claims 1-3 of the ’875 patent as unpatentable.