PTAB

IPR2018-01144

Intel Corp v. VLSI Technology LLC

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Petition
petition

1. Case Identification

2. Patent Overview

  • Title: System-on-Chip Power Management
  • Brief Description: The ’922 patent describes a power island for a system-on-chip (SoC) where different components within the island, specifically a hardware segment (e.g., memory) and a scalable logic segment, are operated with different power characteristics to reduce overall power consumption.

3. Grounds for Unpatentability

Ground 1: Anticipation over Bednar - Claims 2, 3, and 7 are anticipated by Bednar

  • Prior Art Relied Upon: Bednar (Patent 7,131,074).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Bednar disclosed every element of the challenged claims. Bednar’s “voltage island” on an SoC corresponds to the claimed “power island.” Within this island, Bednar taught a “state-saving latch” (the hardware/memory device) powered by a first voltage (VDDO) and a “logic circuit” (the scalable logic) powered by a different, converted voltage (VDDI). Petitioner asserted that Bednar’s “switch element” functioned as the claimed supply power converter, and its “power management state machine” met the limitations of the claimed conversion controller, as it was a separate component that controlled the switch element to power the logic circuit on or off. Dependent claims 2 and 3, which add variable power characteristics controlled externally (for hardware) and internally (for logic), were allegedly disclosed in Bednar’s description of nested voltage islands where a parent island’s regulator externally controls the child island’s supply voltage.
    • Key Aspects: This ground asserted that Bednar alone, a reference not considered during the original prosecution, taught the complete claimed invention, including the allegedly novel separate "conversion controller."

Ground 2: Obviousness over Bednar in view of Gunther - Claims 2, 3, and 7 are obvious over Bednar and Gunther

  • Prior Art Relied Upon: Bednar (Patent 7,131,074) and Gunther (Patent 8,397,090).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that to the extent Bednar was found not to teach "scalable logic" or a "conversion controller" that actively varies voltage, Gunther supplied these elements. Gunther explicitly disclosed power domains with "logic blocks" that can be "adjusted" to operate at different voltages or frequencies to balance performance and efficiency demands. Gunther’s "power management logic" determined when to modify power consumption and sent a signal to a "power regulator" to adjust the voltage accordingly. This supplied the explicit teaching of varying power characteristics for scalable logic.
    • Motivation to Combine: A POSITA would combine Bednar and Gunther because both were directed to the same goal: reducing power consumption in SoCs by using variable power supplies within a power island/domain. A POSITA would be motivated to implement the explicit scalable logic and variable power control from Gunther into Bednar’s voltage island architecture to achieve superior power management.
    • Expectation of Success: Petitioner asserted a high expectation of success, as combining the teachings involved applying known design principles. Gunther's power management logic and Bednar's power management state machine performed similar control functions over their respective voltage regulators, making the integration straightforward and predictable.

Ground 3: Obviousness over Bednar in view of Naveh - Claim 8 is obvious over Bednar and Naveh

  • Prior Art Relied Upon: Bednar (Patent 7,131,074) and Naveh (Application # 2006/0143485).

  • Core Argument for this Ground:

    • Prior Art Mapping: This ground specifically addressed claim 8, which required the memory device of claim 7 to be a static random access memory (SRAM) device. Petitioner contended that while Bednar’s "state-saving latch" was a memory device, Naveh provided the explicit teaching of using SRAM for this function. Naveh described saving the "operating context" of a microprocessor to a memory, which it explicitly identified as potentially being an SRAM, before entering a deep sleep, low-power mode. This function was analogous to Bednar’s latch saving the state of its logic circuit before power-down.
    • Motivation to Combine: A POSITA would combine these references because both addressed power-saving techniques that involved saving a logic component's state to memory before power-down. If Bednar's logic circuit was a complex component like a microprocessor, a POSITA would be motivated to use a well-known, efficient memory solution like the SRAM taught by Naveh to implement Bednar’s state-saving latch.
    • Expectation of Success: There was a reasonable expectation of success because SRAM was a common, well-understood technology, and its implementation as a state-saving memory in Bednar’s architecture would be a predictable application of known components.

  • Additional Grounds: Petitioner asserted additional obviousness challenges, including that claim 8 is obvious over Bednar alone (Ground III), Bednar and Gunther (Ground IV), and the combination of Bednar, Gunther, and Naveh (Ground VI), all relying on similar arguments and combinations of the teachings described above.

4. Key Claim Construction Positions

  • "power island": Petitioner proposed this term be construed as "a group of components with similar power requirements," based on the patentee acting as its own lexicographer in the ’922 patent specification.
  • "conversion controller": Petitioner argued this term must be construed as "a separate component from the supply power converter." This construction was based on a prosecution history disclaimer, where the applicant amended the claims and argued for patentability over the prior art by emphasizing that the controller was a separate component, which led to the claims being allowed.

5. Relief Requested

  • Petitioner requests institution of an IPR and cancellation of claims 2, 3, 7, and 8 of the ’922 patent as unpatentable.