PTAB

IPR2018-01362

BlueHouse Global Ltd. v. Semiconductor Energy Laboratory Co., Ltd.

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1. Case Identification

2. Patent Overview

  • Title: Semiconductor Device
  • Brief Description: The ’840 patent discloses a semiconductor device, specifically a thin film transistor (TFT), featuring an oxide semiconductor layer. The invention focuses on the structure of the source and drain electrodes, which are composed of stacked conductive layers, and their relationship with a gate electrode and a gate insulating layer to form a functional transistor, typically for use in display devices.

3. Grounds for Unpatentability

Ground 1: Anticipation of Claims 1, 4, 14, 16, and 19 under 35 U.S.C. § 102

  • Prior Art Relied Upon: Toyota (Application # 2008/0299693).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Toyota discloses a top-gate TFT that identically teaches every element of independent claims 1 and 14. Specifically, Petitioner asserted that Toyota’s FIG. 3B and its accompanying description show an oxide semiconductor layer (PS), a two-layer source electrode (ST) and a two-layer drain electrode (DT) in physical contact with the semiconductor layer, a gate electrode (GT) overlapping the semiconductor layer, and a gate insulating layer (GI) positioned between them. Petitioner further argued that Toyota explicitly discloses the key structural relationships required by the claims, including that the lower conductive layers (e.g., ST(D)) protrude outward beyond the upper conductive layers (e.g., ST(U)) and that the end portions of the top source and drain layers are opposed to each other. For dependent claims 4 and 19, which require the lower conductive layers to be a nitride of a metal, Petitioner pointed to Toyota's disclosure of using titanium nitride (TiN) as a suitable material for these layers. Claim 16 was argued to be anticipated as it incorporates limitations already disclosed in Toyota.

Ground 2: Obviousness of Claims 2 and 17 over Toyota in view of Chung

  • Prior Art Relied Upon: Toyota (Application # 2008/0299693) and Chung (Application # 2005/0173752).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner asserted that while Toyota teaches all limitations of the base claims (1 and 14), it does not expressly disclose the additional limitation of claims 2 and 17, which requires that the four conductive layers of the source and drain electrodes each have a "tapered shape." Petitioner argued that Chung remedies this deficiency by teaching a TFT with multi-layer drain and source electrodes that have tapered lateral sides.
    • Motivation to Combine: A Person of Ordinary Skill in the Art (POSITA) would combine Chung’s teaching of tapered electrodes with the TFT structure in Toyota. The motivation, as explicitly taught by Chung, was to improve the adhesion of the conductive layers to an overlying layer, which corresponds to the passivation layer (PAS) disclosed in Toyota.
    • Expectation of Success: Petitioner contended that tapering electrode edges was a known technique for improving layer adhesion in semiconductor manufacturing. Therefore, a POSITA would have had a high expectation of success in applying this conventional method to the Toyota device to achieve a predictable improvement in structural integrity.

Ground 3: Obviousness of Claims 4 and 19 over Toyota in view of Miyazaki

  • Prior Art Relied Upon: Toyota (Application # 2008/0299693) and Miyazaki (Patent 6,784,453).
  • Core Argument for this Ground:
    • Prior Art Mapping: This ground was presented as an alternative to the anticipation argument for claims 4 and 19, which require the lower conductive layer to be a "nitride of a metal." Should Toyota’s disclosure of TiN be deemed insufficient for anticipation, Petitioner argued that Miyazaki teaches the missing element. Miyazaki discloses a two-layer gate electrode structure consisting of an aluminum layer stacked on a titanium nitride layer to reduce manufacturing defects, as the nitride layer acts as an etch-stop.
    • Motivation to Combine: A POSITA would be motivated to apply Miyazaki's teaching of a two-layer metal/metal-nitride structure to the source and drain electrodes of the Toyota TFT. The rationale was to achieve the same benefits of improved manufacturing reliability and defect reduction that Miyazaki teaches for its gate electrode structure.
    • Expectation of Success: The principle of using a metal nitride layer for etch selectivity was a known solution to a common problem in semiconductor fabrication. Applying this known solution from the gate electrode context (Miyazaki) to the source/drain electrode context (Toyota) would have been a predictable modification with a high likelihood of success.
  • Additional Grounds: Petitioner asserted an additional obviousness challenge against claims 4 and 19 over Toyota in view of Akimoto (Application # 2007/0072439), which also taught the use of metal nitrides in multi-layer electrodes to achieve similar manufacturing and design goals.

4. Key Claim Construction Positions

  • "in contact with" (all challenged claims): Petitioner proposed this term be construed to mean "physically touching." This construction was asserted as critical to mapping Toyota, where the electrodes connect to the semiconductor layer through contact holes in an insulating film, thereby establishing direct physical contact as required by the claims.
  • "opposed to" (claims 1, 16): Petitioner proposed this term be construed as "located directly across from," based on depictions in the ’840 patent’s figures. This construction was central to arguing that Toyota’s manufacturing process, which forms the source and drain electrodes simultaneously, inherently results in end portions that are directly across from one another, thus meeting the claim limitation.

5. Relief Requested

  • Petitioner requested institution of an inter partes review and cancellation of claims 1, 2, 4, 14, 16, 17, and 19 of the ’840 patent as unpatentable on the grounds specified in the petition.