PTAB
IPR2018-01587
Juniper Networks Inc v. Parity Networks LLC
Key Events
Petition
Table of Contents
petition
1. Case Identification
- Case #: IPR2018-01587
- Patent #: 7,107,352
- Filed: August 23, 2018
- Petitioner(s): Juniper Networks, Inc.
- Patent Owner(s): Parity Networks, LLC
- Challenged Claims: 1-32
2. Patent Overview
- Title: Virtual Egress Packet Classification at Ingress
- Brief Description: The ’352 patent relates to a network packet router system and method that performs both ingress and egress pass/drop rule determinations for data packets at the ingress port. This approach aims to eliminate the need for separate determination capabilities and mechanisms at the egress port, thereby increasing efficiency and reducing system complexity and latency.
3. Grounds for Unpatentability
Ground 1: Claims 1-32 are obvious over Kadambi in view of Bechtolsheim.
- Prior Art Relied Upon: Kadambi (Patent 6,104,696) and Bechtolsheim (Patent 6,377,577).
- Core Argument for this Ground:
- Prior Art Mapping: Petitioner argued that Kadambi disclosed the core concept of the ’352 patent: a network router that performs egress-related determinations at an ingress port. Specifically, Kadambi’s ingress submodule uses lookup tables to determine a packet's destination port based on header information upon arrival, thus obviating the need for a separate lookup at the egress port. Petitioner contended that Bechtolsheim taught a well-known and efficient method for implementing such rule sets in hardware using a content addressable memory (CAM) to store access control lists (ACLs). This hardware-based approach provides the speed benefits that the ’352 patent itself suggests are preferable. Petitioner asserted the combination met all limitations of the independent claims, with Kadambi providing the system architecture and Bechtolsheim providing a known high-speed implementation detail.
- Motivation to Combine: A POSITA would combine these references to improve the performance of packet routing systems, a primary objective in the networking field. Petitioner contended it would have been an obvious design choice to implement Kadambi’s ingress-centric processing architecture using the faster, hardware-based ACL processing taught by Bechtolsheim. This combination would achieve the predictable result of increased packet throughput.
- Expectation of Success: The combination was framed as applying a known hardware acceleration technique (Bechtolsheim’s CAM) to a known network architecture (Kadambi’s ingress-based processing). Petitioner argued a POSITA would have had a reasonable expectation of success in producing a faster, more efficient router without requiring undue experimentation.
Ground 2: Claims 1-32 are obvious over Kalapathy in view of Bechtolsheim.
- Prior Art Relied Upon: Kalapathy (Patent 6,810,037) and Bechtolsheim (Patent 6,377,577).
- Core Argument for this Ground:
- Prior Art Mapping: Petitioner argued that Kalapathy disclosed an architecture for performing multiple, simultaneous table lookups at the ingress port, including lookups traditionally reserved for egress. Kalapathy’s system uses port interface controllers that explicitly group ingress and egress functions together and divides a primary lookup table into multiple sub-tables that can be searched concurrently. This structure inherently performs egress-related determinations (like egress port identification) at the ingress stage. As in Ground 1, Bechtolsheim was cited for its teaching of using a CAM for a high-speed hardware implementation of the rule sets and lookup tables generally described in Kalapathy.
- Motivation to Combine: The motivation was again centered on performance enhancement. Petitioner asserted that a POSITA seeking to build a high-performance router based on Kalapathy’s advanced architecture would have been motivated to look to known hardware acceleration techniques. Bechtolsheim’s CAM-based ACL processing represented a well-understood and readily available solution for implementing the rule-based packet filtering required by Kalapathy’s system in a fast and efficient hardware-based manner.
- Expectation of Success: Petitioner argued that a POSITA would have had a high expectation of success in combining the teachings. The task involved implementing the advanced logical architecture of Kalapathy using the specific, well-known hardware component (CAM) from Bechtolsheim to achieve the predictable and desired benefit of increased processing speed.
4. Relief Requested
- Petitioner requests institution of an inter partes review and cancellation of claims 1-32 of the ’352 patent as unpatentable under 35 U.S.C. §103.
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