PTAB

IPR2018-01605

Microsoft Corp v. Saint Regis Mohawk Tribe

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Petition
petition

1. Case Identification

2. Patent Overview

  • Title: Multi-Adaptive Processing Systems and Techniques for Enhancing Parallelism and Performance of Computational Functions
  • Brief Description: The ’800 patent discloses a method for data processing using a reconfigurable computing system, such as one employing Field Programmable Gate Arrays (FPGAs). The method involves transforming an algorithm into a data-driven calculation where different "data dimensions" are processed concurrently by clusters of functional units in a systolic manner to improve parallelism and performance.

3. Grounds for Unpatentability

Ground 1: Anticipation of Claim 1 - Claim 1 is anticipated by Splash2.

  • Prior Art Relied Upon: Splash2 (a 1996 book by Buell et al. titled "Splash 2, FPGAs in a Custom Computing Machine").
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Splash2, which describes a reconfigurable computing system using Xilinx FPGAs, discloses every limitation of claim 1. The Splash2 system was used to implement systolic array architectures for genetic sequence comparison (the "Edit Distance Algorithm"). Petitioner asserted this system constitutes a "reconfigurable computing system" with "functional units" (Processing Elements, or PEs, configured within the FPGAs). The process of compiling a hardware description language (VHDL) to configure the FPGAs for this task was argued to meet the "transforming an algorithm into a data driven calculation" limitation. The systolic flow, where data arrival triggers computation in each PE, was mapped to the patent's "data driven" and concurrent processing limitations. The configuration of the Splash2 FPGAs for the specific task was argued to meet the "forming" and "instantiating" limitations.
    • Key Aspects: The core of this ground is that a single, comprehensive prior art reference describing a real-world, highly successful reconfigurable computer from the 1990s allegedly contains all the core concepts claimed in the ’800 patent.

Ground 2: Obviousness over Data-Driven Processing - Claims 8 and 9 are obvious over Splash2 in view of RaPiD.

  • Prior Art Relied Upon: Splash2 (1996 book), and RaPiD (a 1997 IEEE article titled "Mapping Applications to the RaPiD Configurable Architecture").
  • Core Argument for this Ground:
    • Prior Art Mapping: This ground addressed dependent claims 8 and 9, which require the calculation to be for JPEG and MPEG image compression, respectively. Petitioner argued that RaPiD discloses implementing a 2-D Discrete Cosine Transform (DCT), a core component of JPEG and MPEG compression, on a reconfigurable, systolic system. The functionality of a cell in RaPiD's array was shown to be analogous to the Processing Elements in Splash2's unidirectional systolic array. The combination of Splash2's architecture with RaPiD's specific image compression application was alleged to render claims 8 and 9 obvious.
    • Motivation to Combine: A POSITA would combine RaPiD's image compression algorithm with the Splash2 platform for several reasons. RaPiD itself cited Splash2 as a "very successful example" of a reconfigurable system, motivating its use. Furthermore, Splash2 included a chapter on image processing, expressly teaching its suitability for such tasks and its performance advantages. By the ’800 patent's priority date, implementing popular techniques like DCT on powerful, well-known reconfigurable hardware like Splash2 would have been an obvious path to achieving efficient performance.

Ground 3: Obviousness over Systolic Encryption - Claim 20 is obvious over Splash2 in view of Jeong.

  • Prior Art Relied Upon: Splash2 (1996 book), and Jeong (a 1997 IEEE article titled "VLSI array algorithms and architectures for RSA modular multiplication").
  • Core Argument for this Ground:
    • Prior Art Mapping: This ground targeted claim 20, which specifies the calculation is an "encryption algorithm." Jeong discloses a systolic implementation of a modular multiplication algorithm for RSA encryption, explicitly stating it is suitable for implementation in FPGAs. Petitioner argued that Jeong’s systolic array of processing nodes is structurally similar to the unidirectional array in Splash2. The combination results in the Splash2 system performing Jeong's encryption algorithm, thus satisfying the limitations of claim 20.
    • Motivation to Combine: A POSITA would have been motivated to implement Jeong's encryption algorithm on the Splash2 system. Jeong explicitly suggests using FPGAs, and Splash2 was a well-known, successful FPGA-based platform. Given the increasing popularity of systolic systems for data encryption by the patent's priority date, applying Jeong's systolic encryption method to a known systolic processing platform like Splash2 would have been an obvious design choice to achieve high throughput and efficiency.
  • Additional Grounds: Petitioner asserted that claim 1 is obvious over Splash2 alone and also over Splash2 in view of Gaudiot (a 1987 article on data-driven multicomputers), arguing that Gaudiot explicitly teaches the "data-driven" principles that Splash2 implements.

4. Key Claim Construction Positions

  • "functional unit": Petitioner proposed this term be construed as "a computational unit configured to perform a specific task." This construction was based on the patent's description of such units in both conventional CPUs and reconfigurable processors.
  • "data driven": Proposed as "the scheduling of operations upon the availability of their operands." This construction was supported by an external technical reference as the patent itself provided no explicit definition.
  • "transforming an algorithm into a data driven calculation": Proposed as "compiling an algorithm into configuration code representing computations that process data in a data driven fashion." This was argued to be the practical meaning of applying an algorithm to a reconfigurable hardware system like an FPGA.
  • "form": Petitioner argued this term should be construed as "create, such as by configuring, a particular structure," equating it with the term "instantiate" used in the parent patent and prosecution history.

5. Relief Requested

  • Petitioner requested institution of an inter partes review and cancellation of claims 1, 8, 9, and 20 of the ’800 patent as unpatentable.