PTAB

IPR2019-00020

Samsung Electronics Co Ltd v. Invensas Bonding Technologies Inc

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Petition
petition

1. Case Identification

2. Patent Overview

  • Title: Method for Bonding at Low or Room Temperature
  • Brief Description: The ’143 patent discloses a method for bonding semiconductor wafers at low or room temperature to achieve high bond strength. The process involves forming and planarizing a bonding layer, activating its surface via a slight etching process, terminating the surface with a desired chemical species, and bringing it into contact with another surface.

3. Grounds for Unpatentability

Ground 1: Obviousness over Li and Reiche - Claims 1, 3-4, 6, 14-15, 21-22, 24, and 29-31 are obvious over Li in view of Reiche.

  • Prior Art Relied Upon: Li (a 1998 journal article on low-temperature silicon bonding) and Reiche (a 1997 conference proceeding on plasma pretreatment for Si/Si bonding).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Li discloses all steps of the claimed bonding method. Li teaches a process for low-temperature direct bonding of SiO2 surfaces (a planarized insulating material) on silicon wafers. This process includes a surface activation step using ammonia or oxygen plasma in a reactive ion etcher (RIE), which Petitioner asserted is the claimed "etching." Petitioner contended that Li's use of ammonia (NH3) plasma constitutes the claimed "terminating the...material with a nitrogen-containing species...during the etching." Li then teaches bringing the wafers into direct contact face-to-face at room temperature outside the RIE chamber, resulting in a strong chemical (covalent) bond after annealing, with a bond strength greater than 1000 mJ/m². Reiche was cited to supplement Li's teachings, particularly regarding the effects of RIE plasma treatments on surface roughness, a parameter Li identifies as important for successful bonding.
    • Motivation to Combine: A POSITA would combine Li and Reiche because both address improving low-temperature wafer bonding strength. Li teaches the importance of "smooth, flat samples" but does not detail the effect of its plasma activation on surface roughness. Reiche specifically investigates the effect of RIE treatments on surface roughness and teaches how to achieve strong bonds while minimizing roughness. Therefore, a POSITA would look to Reiche's detailed analysis to optimize the plasma activation process disclosed in Li.
    • Expectation of Success: A POSITA would have a high expectation of success because both references describe applying RIE plasma activation to similar silicon and SiO2 surfaces for the same purpose of enhancing low-temperature wafer bonding. Combining them would be a predictable optimization of a known process.

Ground 2: Obviousness over Li, Reiche, and Bower - Claims 1, 3-4, 6, 14-15, 20-22, 24, and 29-31 are obvious over Li and Reiche in view of Bower.

  • Prior Art Relied Upon: Li (a 1998 journal article), Reiche (a 1997 conference proceeding), and Bower (Patent 5,503,704).
  • Core Argument for this Ground:
    • Prior Art Mapping: This ground relied on the core combination of Li and Reiche from Ground 1 and added Bower to provide more explicit teachings for certain limitations. For claim 20, which requires a surface roughness between 0.5 and 1.5 nm, Petitioner argued Bower teaches that successful low-temperature nitrogen bonding requires a surface microroughness of less than 10 Å (1.0 nm). For claim 22, which adds an integrated circuit on the semiconductor material, Bower explicitly teaches applying its bonding process to "planarized surfaces of 'completed' integrated circuit chips and wafers." Similarly, for claim 32, which requires forming the material on a "processed semiconductor wafer," Bower teaches applying its process to wafers with "conventional A1 metalization," which Petitioner asserted would be understood as processed wafers.
    • Motivation to Combine: A POSITA would combine the teachings of Bower with Li and Reiche due to the strong similarities in their disclosed technologies. Both Li and Bower describe low-temperature bonding processes activated by ammonia plasma on silicon and SiO2 surfaces. Bower was presented as providing further details on issues identified in Li, such as specific requirements for surface roughness and the applicability of the process to wafers already containing integrated circuits. A POSITA seeking to apply Li's process to commercial-grade, processed wafers would naturally consult a reference like Bower, which explicitly addresses such applications.
    • Expectation of Success: The combination was argued to be predictable. Given that Bower's ammonia plasma process is analogous to Li's, a POSITA would reasonably expect to be able to configure the Li/Reiche plasma process to achieve the specific surface roughness taught by Bower and apply the overall method to the types of processed wafers Bower discloses.

4. Relief Requested

  • Petitioner requests institution of an inter partes review and cancellation of claims 1, 3-4, 6, 14-15, 20-22, 24, and 29-33 of the ’143 patent as unpatentable under 35 U.S.C. §103.