PTAB

IPR2019-00058

ARM Ltd v. Complex Memory LLC

Key Events

Petition

petition

Title: Energy-Conserving Operating System
Brief Description: The ’576 patent discloses a computer system designed to conserve energy by using two distinct operating modes. A low-power “keep-alive” mode utilizes dedicated circuitry and instructions to monitor for incoming communications (e.g., a ring signal), while a high-power “main” mode utilizes the main microprocessor and its operating instructions for computationally intensive tasks.

Prior Art Relied Upon: Smith (Patent 5,167,024).
Core Argument for this Ground:
- Prior Art Mapping: Petitioner argued that Smith disclosed every element of claim 25. Smith described a portable computer with a low-power Power Manager (PMGR) microprocessor and a main high-power CPU. The PMGR executed its own software ("keep-alive operating instructions") to monitor for events like a ring signal from a modem ("power-up signal"). Upon detecting such a signal, the PMGR powered up the main CPU, which then executed its own set of "main operating instructions." When activity ceased, the PMGR powered down the main CPU to conserve energy ("power-down signal").
- Key Aspects: This ground relied on the Petitioner's proposed claim construction, arguing Smith’s PMGR (a Mitsubishi microcontroller) and main CPU (a Motorola 68000) used different instruction sets and separate operating systems, consistent with the patentee's arguments during prosecution to overcome prior art.

Prior Art Relied Upon: Perry (Patent 5,142,684).
Core Argument for this Ground:
- Prior Art Mapping: Petitioner asserted that Perry, like Smith, taught a dual-microprocessor system that anticipated claim 25 under the narrower claim construction. Perry explicitly described a low-power, low-performance processor for background tasks ("keep-alive operation") and a high-power, high-performance processor for computationally intensive foreground tasks ("main operation"). The low-power processor was continuously active and would activate ("powering up") the high-power processor when needed. After a period of inactivity, the low-power processor deactivated ("powering down") the high-power processor to conserve battery life.
- Key Aspects: Perry’s use of two distinct microprocessors (an 8-bit Motorola and a 16-bit RTX 2000) that executed separate programs from distinct memory areas was argued to meet the requirement for two separate sets of operating instructions.

Prior Art Relied Upon: Matoba (Patent 5,913,068).
Core Argument for this Ground:
- Prior Art Mapping: This ground was presented as an alternative, contingent on the Board adopting a broader claim construction that does not require separate operating systems or instruction sets. Petitioner argued that Matoba described a system with multiple CPUs having different power consumptions and performance levels. CPU switching control software selected either a low-power CPU for energy conservation or a high-power CPU for performance. The system switched between CPUs by saving the state of the first, stopping its power or clock, and loading the state into the second.
- Key Aspects: Petitioner argued that if the limitations added to overcome the Barber reference during prosecution (requiring separate instruction sets) were not given weight, then Matoba’s system, which could run under a single common operating system, anticipated claim 25.

Prior Art Relied Upon: Harper (Patent 5,560,024).
Core Argument for this Ground:
- Prior Art Mapping: This ground was based on the Patent Owner's own infringement contentions in district court litigation. Petitioner argued that if the Patent Owner's interpretation of claim 25 was correct, then Harper anticipated it. Under this theory, a single processor executing a "wait for interrupt" instruction enters an energy-conserving state ("keep-alive operation"). The interrupt itself is the "power-up signal," causing the processor to resume executing the main application program ("main operation"). The "wait" instruction is also the "power-down signal." Harper disclosed this exact mechanism, where a processor's clock is stopped to save power and restarted in response to an interrupt (e.g., a keypress).
- Key Aspects: Petitioner invoked the principle that the same claim construction must be used for both infringement and validity, asserting that "that which infringes, if later, would anticipate, if earlier."
Additional Grounds: Petitioner asserted that if Smith, Perry, Matoba, and Harper were found not to anticipate, each reference independently rendered claim 25 obvious under 35 U.S.C. §103 in view of the knowledge of a person of ordinary skill in the art.

"Set Of Keep-Alive Operating Instructions" / "Set Of Main Operating Instructions": Petitioner argued that, based on the applicant's clear and unambiguous statements during prosecution to distinguish the invention from the Barber prior art, these terms must be construed to require two separate and distinct sets of instructions. Specifically, the patentee disclaimed systems that utilize a "common operating instruction set" and argued their invention comprised "two sets of operating systems." This construction was presented as critical for differentiating valid prior art approaches from the patented invention.

Petitioner requested institution of an inter partes review (IPR) and cancellation of claim 25 of Patent 6,658,576 as unpatentable.