PTAB

IPR2019-00274

Qualcomm Inc v. Apple Inc

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Key Events
Petition
petition

1. Case Identification

2. Patent Overview

  • Title: Integrated Circuit with Separate Supply Voltage for Memory that is Different from Logic Circuit Supply Voltage
  • Brief Description: The ’559 patent discloses an integrated circuit designed to conserve power by using separate supply voltages for its logic and memory circuits. This allows the logic circuit supply voltage to be lower than the memory supply voltage, reducing power consumption without compromising the memory circuit's reliability.

3. Grounds for Unpatentability

Ground 1: Anticipation of Claims 1-4 by Clark

  • Prior Art Relied Upon: Clark (Patent 6,650,589)
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Clark discloses every element of the challenged claims. Independent claim 1 recites an integrated circuit with a logic circuit operating in a first voltage domain and a memory circuit (with SRAM cells) in a second, where the logic voltage can be lower than the memory voltage. Petitioner contended Clark’s integrated circuit 10 meets these limitations, identifying the "microprocessor core 20" as the logic circuit and the "SRAM core 40" as the memory circuit. Clark explicitly teaches supplying these components with different voltages received on separate inputs (pin 70 for the logic and pin 80 for the memory) and states the microprocessor voltage can be lower than the SRAM voltage to save power. Dependent claims 2-4 add limitations for additional circuits operating in the first voltage domain, including precharge circuits. Petitioner asserted that Clark’s translator block 30, sense amplifiers 50, and precharge devices 290 are all disclosed as operating in the first voltage domain, thereby anticipating these claims as well.

Ground 2: Anticipation of Claims 1 and 2 by Kawata

  • Prior Art Relied Upon: Kawata (Patent 6,920,071)
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Kawata’s semiconductor integrated circuit anticipates claims 1 and 2. Kawata describes an integrated circuit with a "logical circuit" and multiple SRAMs to achieve low energy consumption. The logical circuit is supplied by a first, lower voltage (VDD), while the SRAM memory cells are supplied by a second, higher voltage (VDDH). Petitioner asserted this maps directly onto the limitations of claim 1, which requires the logic circuit's first voltage domain to have a lower voltage than the memory circuit's second voltage domain. Kawata explicitly discloses exemplary values where VDD (e.g., 0.8V) is lower than VDDH (e.g., 1.2V). Dependent claim 2 requires the memory circuit to have additional circuits operating in the first (lower) voltage domain. Petitioner contended that Kawata’s decoder circuit and level shifting circuit are part of the SRAM memory circuit and are disclosed as being supplied by the lower VDD voltage, thus anticipating claim 2.

4. Key Claim Construction Positions

  • "receiving power from at least one first / second input to the integrated circuit": Petitioner highlighted that during prosecution of a related patent, the applicant added this "input" limitation to overcome the Daga prior art, which had only one external power supply input. However, Petitioner argued for a broad construction, consistent with the Patent Owner's position in co-pending litigation, where an "input" does not need to be an external pin. This construction means a voltage generated internally and supplied to a component (like the logic circuit) is still "received on an input." This interpretation is critical for Petitioner's argument that both Clark (in one embodiment) and Kawata meet this limitation, even though their lower logic voltages are generated on-chip from a higher voltage supply.
  • "integrated circuit": Petitioner argued for adopting the district court's construction of "one or more circuit elements that are integrated onto a single semiconductor substrate." This broad definition supports the view that various combinations of components within the prior art references constitute the claimed "integrated circuit."
  • "during use": Petitioner proposed construing this term by its plain and ordinary meaning, or as "while operating," consistent with the Patent Owner's litigation position. This ensures that the disclosed operating voltages in the prior art satisfy the temporal requirement of the claims.

5. Relief Requested

  • Petitioner requested institution of an IPR and cancellation of claims 1-4 of the ’559 patent as unpatentable under pre-AIA 35 U.S.C. §102.