PTAB

IPR2019-00638

Kingston Technology Co Inc v. Memory Technologies LLC

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Petition
petition

1. Case Identification

2. Patent Overview

  • Title: Method and Apparatus for Write Protecting Memory
  • Brief Description: The ’370 patent describes a method for permanently write-protecting a specific portion of a peripheral memory card, such as a MultimediaCard (MMC). The invention purports to achieve this by redefining an existing write-protection command, which is normally temporary, to become permanent by setting a specific bit in a data register.

3. Grounds for Unpatentability

Ground 1: Anticipation of Claims 1-3, 5-6, 12-15, and 25 under §102 by Chevallier

  • Prior Art Relied Upon: Chevallier (Application # 2004/0083346).
  • Core Argument:
    • Prior Art Mapping: Petitioner argued that Chevallier discloses every limitation of the challenged claims. Chevallier teaches a flash memory device with both a temporary "lock" function and a permanent "secure" function. Crucially, Chevallier discloses that the same command can be used for both functions. The function is determined by the state of a "secure function bit" in a control register. When this bit is set, the command executes the permanent secure function; otherwise, it executes the temporary lock function. Petitioner contended this directly maps to the ’370 patent’s claimed method of "setting at least one bit in a data register" to "redefine the command to allow permanent write protection." Chevallier further describes applying this protection to specific memory blocks, the size of which is defined by a control data word, meeting limitations for dependent claims.
    • Key Aspects: Petitioner emphasized that Chevallier’s secure function is explicitly described as permanent and unable to be cleared once set, directly corresponding to the ’370 patent's claim limitation that the protection "cannot be un-protected by a command."

Ground 2: Obviousness of Claims 1-3, 5-7, 12-15, 19, and 25 under §103 over Chevallier in view of Toombs

  • Prior Art Relied Upon: Chevallier (Application # 2004/0083346) and Toombs (Patent 6,279,114).

  • Core Argument:

    • Prior Art Mapping: Petitioner asserted that Chevallier teaches most claim limitations, while Toombs supplies teachings related to the specific architecture of MMCs and the use of its Card Specific Data (CSD) register. Toombs discloses an MMC architecture with a CSD register containing various bits that control command functionality, such as the PERM_WRITE_PROTECT and TMP_WRITE_PROTECT bits for protecting the entire card, and WP_GRP_ENABLE and WP_GRP_SIZE bits for protecting portions ("memory groups") of the card.
    • Motivation to Combine: A Person of Ordinary Skill in the Art (POSITA) would combine these references for two primary reasons. First, a POSITA would be motivated to implement Chevallier’s flexible permanent/temporary write protection feature within the well-known and standardized MMC architecture disclosed by Toombs to meet consumer demand for such devices. Second, a POSITA would apply Toombs' technique of using dedicated bits in a CSD register to control command behavior to Chevallier's system. This would solve the problem in Chevallier of how to unambiguously specify whether a single command should perform a temporary lock or a permanent secure function, which Toombs shows can be done via register bits.
    • Expectation of Success: The combination would have been a predictable integration of known technologies. Implementing Chevallier's secure function bit within Toombs' CSD register would predictably result in a memory card where a specific bit controls whether a standard write-protect command provides temporary or permanent protection for memory groups, as claimed.

  • Additional Grounds: Petitioner asserted obviousness of claims 1-3, 5-6, 12-15, and 25 over Chevallier in view of the knowledge of a POSA, arguing that anticipation is the epitome of obviousness. Petitioner also asserted that claim 25 is obvious over the combination of Chevallier, Toombs, and Estakhri (Patent 6,262,918), where Estakhri was cited for its teaching of a memory device with firmware for executing stored instructions.

4. Key Claim Construction Positions

  • "a data register": Petitioner argued this term means "a portion of memory containing information about a memory card." This construction is based on the ’370 patent’s focus on the CSD register, which contains card-specific metadata. Petitioner noted the Patent Owner agreed to this construction in co-pending litigation.
  • "redefine the command to allow permanent write protection": Petitioner proposed this phrase means "to cause a command that would not result in permanent write protection to result in permanent write protection." This construction is central to Petitioner’s theory that the invention merely changes the effect of an existing command (like SET_WRITE_PROT) based on the state of a separate bit, a technique disclosed in the prior art. The Patent Owner also reportedly agreed to this construction.
  • "reprogrammable": For claim 3, Petitioner argued this means the value of the bit is changeable. This is supported by Toombs’ disclosure of a TMP_WRITE_PROTECT bit in the CSD register designated as readable, writable, and erasable (R/W/E).

5. Relief Requested

  • Petitioner requested the institution of an inter partes review and cancellation of claims 1-3, 5-7, 12-15, 19, and 25 of the ’370 patent as unpatentable.