Intel Corp v. VLSI Technology LLC

1. Case Identification

• Case #: IPR2019-01195
• Patent #: 8,081,026
• Filed: June 28, 2019
• Petitioner(s): Intel Corporation
• Patent Owner(s): VLSI Technology, LLC
• Challenged Claims: 13, 14, 17, 18, and 20

2. Patent Overview

• Title: Power Gating Switch Control
• Brief Description: The ’026 patent discloses a power-saving method for integrated circuits. The method uses a power gating switch to control the output supply voltage provided to a power-gated circuit based on two primary inputs: a "mode indicator" specifying the desired operational state (e.g., active or sleep) and a "leakage indicator" representing the circuit's leakage current level.

3. Grounds for Unpatentability

Ground 1: Anticipation of Claims 13 and 14 by Kim

• Prior Art Relied Upon: Kim (Application # 2008/0136507).
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner argued that Kim anticipates every limitation of claims 13 and 14. Kim described a system for controlling a power gating switch (an array of sleep transistors) that supplies a virtual voltage (VVCC) to a processor. The control circuit (NAND gates) in Kim receives two inputs: a "Sleep" signal, which functions as the claimed "mode indicator" to switch between active and sleep modes, and the output of memory cells, which functions as the claimed "leakage indicator." The values in these memory cells are programmed based on a process of measuring the processor's active leakage and iteratively turning off transistors until leakage is no longer excessive. This stored leakage data, combined with the mode signal, determines the control signal sent to the power gating switch, thereby adjusting the output voltage based on both mode and leakage level, as recited in the claims.
  • Key Aspects: Petitioner contended that Kim's process of measuring leakage during manufacturing and storing the result in memory cells to control the power gate during operation directly corresponds to the ’026 patent's use of a "leakage indicator."

Ground 2: Obviousness of Claims 17, 18, and 20 over Kim in view of Lee

• Prior Art Relied Upon: Kim (Application # 2008/0136507) and Lee (Application # 2007/0147159).
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner asserted that Kim, as the primary reference, teaches the core system of controlling a power gate using mode and leakage indicators. The challenged dependent claims add further limitations that are disclosed by Lee.
  • Claim 17 adds selecting a leakage reduction value based on the temperature of the integrated circuit. Kim’s control logic contemplates using "external stimuli," but does not explicitly name temperature. Lee explicitly teaches using a temperature sensor as an input to its control circuit to adjust the power gate's output voltage, compensating for known temperature-induced leakage variations.
  • Claim 18 adds selecting a "retention value" for the control signal when the circuit enters a "retention mode." Kim teaches active and sleep (shut down) modes. Lee teaches three modes: active, standby (a data retention mode), and deep power down (shut down). Petitioner argued Lee's standby mode is the claimed retention mode.
  • Claim 20 combines the limitations of claims 17 and 18, requiring selection of a retention value based on both temperature and leakage.
  • Motivation to Combine: A Person of Ordinary Skill in the Art (POSITA) would combine Lee's teachings with Kim's system for predictable improvements. A POSITA would incorporate Lee's temperature input as an "external stimulus" in Kim to create a more robust system that manages leakage based on both manufacturing variations (from Kim) and operational temperature changes (from Lee). Similarly, a POSITA would be motivated to add Lee's "standby" (retention) mode to Kim's two-mode system to provide an intermediate power-saving state that allows for faster returns to active mode, a well-known design goal.
  • Expectation of Success: A POSITA would have a high expectation of success. Combining the references would involve applying a known technique (temperature compensation from Lee) to improve a similar device (Kim's power gating system) to obtain predictable results. Implementing an additional mode signal or temperature input into Kim's architecture would be a matter of routine design choice using standard components like multiplexers or modified firmware, which Kim's disclosure already suggests.

4. Arguments Regarding Discretionary Denial

• Petitioner argued that the Board should not exercise its discretion to deny institution under 35 U.S.C. §314(a) or §325(d). Petitioner asserted that due to the complexity of parallel district court litigation involving numerous patents, it would have limited time to present its invalidity defense at trial. It further contended that the petition presents unique issues and is an efficient alternative to litigation, and that the same or substantially similar arguments had not been previously presented to the U.S. Patent and Trademark Office.

5. Relief Requested

• Petitioner requested the institution of an inter partes review and the cancellation of claims 13, 14, 17, 18, and 20 of the ’026 patent as unpatentable.