PTAB

IPR2019-01387

Universal Imaging Industries LLC v. Lexmark Intl Inc

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Petition
petition

1. Case Identification

2. Patent Overview

  • Title: Dynamically Changing Address of a Slave Device on a Shared Bus
  • Brief Description: The ’921 patent discloses a method for enhancing security in master-slave communication systems, such as printers and consumable toner cartridges. The system involves a master device sending a plurality of address change commands to a slave device, which then dynamically generates new addresses to prevent unauthorized components using a static or copied set of addresses from communicating with the master.

3. Grounds for Unpatentability

Ground 1: Obviousness over Mayer and I²C Spec - Claims 1-2, 4-7, 15-17, and 19-21 are obvious over [Mayer](https://ai-lab.exparte.com/case/ptab/IPR2019-01387/doc/1005) in view of the [I²C Spec](https://ai-lab.exparte.com/case/ptab/IPR2019-01387/doc/1003).

  • Prior Art Relied Upon: Mayer (Patent 7,506,086) and I²C Spec (Version 2.1 of the I²C-Bus Specification).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Mayer discloses the core invention: a data communication system where a master communicates with slaves over a shared bus and can request that the slaves dynamically generate new unique addresses (termed "identification codes"). Mayer’s slaves possess address generators and generate new addresses in response to a master’s command. Petitioner asserted that the I²C Spec, as a "de facto world standard" for the type of shared bus communication described, supplies the conventional protocol details, such as the requirement for sending acknowledgements (as recited in dependent claim 2), that a person of ordinary skill in the art (POSITA) would naturally use to implement Mayer’s system.
    • Motivation to Combine: A POSITA would combine Mayer's dynamic addressing method with the ubiquitous I²C Spec standard because Mayer's system is built upon the general principles of shared bus communication that the I²C Spec codifies. The combination represented a predictable implementation of Mayer's abstract addressing concepts using a well-known, standardized communication protocol to achieve a working system.
    • Expectation of Success: Petitioner contended there was a high expectation of success, as combining Mayer's address generation logic with the standard I²C bus protocol involved applying known engineering principles to integrate a specific function into a standard communication framework.

Ground 2: Obviousness over Mayer and Applegate - Claims 3, 8-14, and 18 are obvious over [Mayer](https://ai-lab.exparte.com/case/ptab/IPR2019-01387/doc/1005) in view of [Applegate](https://ai-lab.exparte.com/case/ptab/IPR2019-01387/doc/1006).

  • Prior Art Relied Upon: Mayer (Patent 7,506,086) and Applegate (Patent 5,995,774).
  • Core Argument for this Ground:
    • Prior Art Mapping: This ground built upon the teachings of Mayer for dynamic address generation and added Applegate to supply the context of the claimed "consumable device." Petitioner argued Applegate explicitly discloses an electrophotographic printer with a detachable process cartridge ("a tank containing toner or ink") that contains a non-volatile memory device for communication with the printer. The combination of Mayer’s dynamic addressing with Applegate’s printer cartridge system allegedly meets the limitations of the claims directed to a consumable device, such as claims 3, 8, and 9.
    • Motivation to Combine: A POSITA would be motivated to combine Mayer's security-focused dynamic addressing with Applegate's printer cartridge system to improve the authentication of consumable components. Applying Mayer's method to the system in Applegate addressed the known industry problem of preventing the use of unauthorized or counterfeit third-party cartridges, which was a primary motivation for such security measures.
    • Expectation of Success: Integrating the bus-based addressing scheme of Mayer into the printer cartridge system of Applegate was argued to be a straightforward application of known communication techniques to a specific and well-understood field of technology.

Ground 3: Obviousness over Adkins - Claims 1-21 are obvious over [Adkins](https://ai-lab.exparte.com/case/ptab/IPR2019-01387/doc/1007).

  • Prior Art Relied Upon: Adkins (Application # 2010/0306431).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner asserted that Adkins, as a single reference, renders all challenged claims obvious. Adkins discloses a master/slave communication system where a master device periodically requests that a slave device change its address specifically to "thwart attempts by imposters to gain access to the system." Petitioner argued Adkins teaches all key elements: a slave device receiving a "change address" command, using its own dynamic address generator to create a new random address, self-assigning the new address, and sending an acknowledgment to the master before the next command can be sent. Adkins also discloses this system in the context of a replacement ink cartridge.
    • Key Aspects: Petitioner highlighted that the ’921 patent itself identifies Adkins as related art on its face but does not claim priority to it, suggesting Adkins’s teachings were well-known to the patent owner and directly relevant. Because Adkins teaches all claimed elements functioning together for the same stated purpose, Petitioner argued it rendered the entire invention obvious without needing a combination of references.
  • Additional Grounds: Petitioner asserted further obviousness challenges against claims 1-2, 4-7, 15-17, and 19-21 over Schön (Patent 5,708,831) in view of the I²C Spec, and against claims 3, 8-14, and 18 over Schön, the I²C Spec, and Applegate. These grounds relied on arguments analogous to those made for the Mayer combinations, with Schön serving as the primary reference for dynamic address generation on a shared bus.

4. Relief Requested

  • Petitioner requests institution of an inter partes review and cancellation of claims 1-21 of Patent 9,176,921 as unpatentable.