PTAB

IPR2020-01007

Micron Technology, Inc. v. Godo Kaisha IP Bridge 1

1. Case Identification

2. Patent Overview

  • Title: Semiconductor Device
  • Brief Description: The ’041 patent relates to semiconductor devices, such as DRAM, that use copper interconnects. The invention purports to solve the known problem of copper atoms diffusing into and damaging the memory storage portion by employing a dedicated “copper-diffusion blocking means,” comprising a “ceiling film” and a “vertical wall” made of materials like silicon nitride, to surround the memory region.

3. Grounds for Unpatentability

Ground 1: Obviousness over Liang - Claims 1-12 and 15-17 are obvious over Liang.

  • Prior Art Relied Upon: Liang (Patent 6,368,952).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Liang taught every element of the challenged claims. Liang was directed to inhibiting copper diffusion in microelectronic devices and disclosed a semiconductor device with a transistor-based memory portion (or alternatively, a capacitor-based one) and copper interconnects. Critically, Liang disclosed a structure to prevent copper diffusion that was structurally indistinguishable from that claimed in the ’041 patent: a “blanket capping diffusion barrier dielectric layer 26” (the ceiling film) and “patterned diffusion barrier dielectric layers 24a and 24b” (the vertical wall) that fully encapsulate the memory transistor.
    • Motivation to Combine (for §103 grounds): As this ground relied on a single reference, Petitioner contended Liang itself provided the motivation to use its disclosed barrier structure to solve the well-known problem of copper diffusion from interconnects into memory elements, which Liang explicitly addressed.
    • Expectation of Success (for §103 grounds): Petitioner asserted a person of ordinary skill in the art (POSITA) would have had a high expectation of success, as Liang taught that its silicon nitride barrier layers fully encapsulated the memory transistor to prevent degradation from copper diffusion.

Ground 2: Obviousness over Liang and El-Kareh - Claims 13 and 14 are obvious over Liang in view of El-Kareh.

  • Prior Art Relied Upon: Liang (Patent 6,368,952), El-Kareh (a 1997 article titled “The Evolution of DRAM Cell Technology”).
  • Core Argument for this Ground:
    • Prior Art Mapping: This ground built upon Ground 1 to address the specific limitation in claims 13 and 14 that the memory portion is for “accumulating and releasing charges according to information.” While Liang disclosed its protective structure for a transistor memory (and mentioned capacitors as an alternative), El-Kareh was cited to show that the predominant memory technology at the time was DRAM, which used storage capacitors to accumulate and release charge to represent logical ‘1’ and ‘0’ states.
    • Motivation to Combine (for §103 grounds): A POSITA would combine Liang’s diffusion barrier with a standard DRAM cell as described by El-Kareh. The motivation was strong because DRAM was the industry standard, and as device sizes shrank, protecting these capacitor-based cells from copper diffusion was a known and critical requirement.
    • Expectation of Success (for §103 grounds): Success would be expected because Liang expressly stated its invention was useful for protecting both memory circuits and capacitors from copper diffusion, making its application to the standard DRAM cell of El-Kareh a predictable implementation.

Ground 3: Obviousness over Kishii and Ryan - Claims 1-17 are obvious over Kishii in view of Ryan.

  • Prior Art Relied Upon: Kishii (JP H5-198769A), Ryan (a 1995 article titled “The Evolution of Interconnection Technology at IBM”).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Kishii disclosed a DRAM device with a stacked capacitor memory storage portion fully surrounded by a thick silicon nitride “protective film” (film 28). This film inherently served as the claimed “copper-diffusion blocking means,” providing both a ceiling film and vertical walls. Ryan was cited to teach that multilevel copper interconnects embedded in insulation were routinely used with DRAM devices like Kishii’s to connect circuit elements and distribute power.
    • Motivation to Combine (for §103 grounds): A POSITA would have been motivated to apply the routine copper interconnect structures taught by Ryan to Kishii’s DRAM device. Kishii explicitly stated its device was intended for use with such multilayer interconnects to be functional, and Ryan explained that copper was the preferred, higher-performance material for these interconnects.
    • Expectation of Success (for §103 grounds): A POSITA would have had a high expectation of success because Kishii’s thick, surrounding silicon nitride film was a known and reliable copper diffusion barrier material, which would have been understood to effectively protect the capacitor from the added copper interconnects taught by Ryan.

4. Key Claim Construction Positions

  • “Apart from Said Memory Storage Portion” (Claim 1): Petitioner argued this term required no special construction beyond its plain meaning of “separate from” or “not a component of.” This was argued to counter a potential Patent Owner position from a prior proceeding that the term implied a specific “spacing” or additional intermediate layers between the wiring and memory portions, a reading Petitioner contended was not supported by the claims or specification.
  • “Copper-Diffusion Blocking Means” (Claim 1): Petitioner contended this was a means-plus-function limitation under §112, ¶ 6.
    • Function: “blocking copper diffusion from said wiring portion toward said memory storage portion.”
    • Corresponding Structure: Based on the ’041 patent’s disclosure, Petitioner identified the corresponding structure as “a ceiling film or a vertical wall,” noting that the fourth embodiment disclosed that either structure alone was sufficient to perform the function.

5. Arguments Regarding Discretionary Denial

  • Petitioner presented substantial arguments that the Board should not exercise its discretion to deny institution under Fintiv. The core arguments were:
    • Petitioner acted with diligence, filing the IPR petition less than three months after being sued in a parallel district court litigation, of which it had no pre-suit notice.
    • The parallel litigation was in its earliest stages, with no case management schedule set and minimal activity beyond the initial complaint and answer, weighing against denial.
    • The merits of the petition were strong, as evidenced by the Board’s previous institution of an IPR on similar grounds (IPR2018-00664), and institution would serve system efficiency and integrity.
    • The IPR would resolve the patentability of all 17 claims, whereas the district court complaint only identified claim 1 as being infringed, making the IPR a more comprehensive and efficient forum.

6. Relief Requested

  • Petitioner requested institution of an inter partes review and cancellation of claims 1-17 of the ’041 patent as unpatentable.