PTAB
IPR2020-01275
Apple Inc v. Solas OLED Ltd
Key Events
Petition
Table of Contents
petition
1. Case Identification
- Case #: IPR2020-01275
- Patent #: 7,446,338
- Filed: July 22, 2020
- Petitioner(s): Apple Inc.
- Patent Owner(s): Solas OLED, Ltd.
- Challenged Claims: 1-3, 5-13
2. Patent Overview
- Title: Display Panel
- Brief Description: The ’338 patent describes an active-matrix organic light-emitting diode (AMOLED) display panel. The technology centers on two key features: (1) conductive "interconnections" that project from the surface of the transistor array substrate to reduce electrical resistance, and (2) a specific three-transistor pixel circuit comprising a driving transistor, a switch transistor, and a holding transistor.
3. Grounds for Unpatentability
Ground 1: Claims 1-2, 5-6, and 9-11 are obvious over Kobayashi in view of Shirasaki
- Prior Art Relied Upon: Kobayashi (Application # 2002/0158835) and Shirasaki (Application # 2004/0113873).
- Core Argument for this Ground: Petitioner argued that Kobayashi disclosed a conventional AMOLED display with projecting "common" type interconnections and a standard two-transistor pixel circuit. Shirasaki, which was not considered during prosecution and shares an inventor with the ’338 patent, expressly taught the benefits of replacing two-transistor circuits with the specific three-transistor circuit recited in the challenged claims. Petitioner asserted that a person of ordinary skill in the art (POSA) would have been motivated to substitute Shirasaki’s improved circuit into Kobayashi’s display to achieve predictable benefits in performance and display quality.
- Prior Art Mapping: Kobayashi was alleged to teach the foundational AMOLED structure, including a transistor array substrate, pixel electrodes, and projecting "auxiliary wiring elements" that function as the claimed "common interconnections" to reduce the resistance of the counter electrode. Kobayashi, however, only disclosed a two-transistor (driving and switching) pixel circuit. Shirasaki was asserted to supply the missing "holding transistor" limitation, disclosing a pixel circuit identical to that claimed in the ’338 patent.
- Motivation to Combine: Petitioner argued Shirasaki provided an express motivation to combine. Shirasaki identified performance issues in conventional two-transistor circuits, such as difficulty maintaining desired luminance over time due to variations in transistor characteristics. It proposed its three-transistor circuit as a solution that "stably display[s] images with desired luminance," thereby motivating a POSA to replace the inferior two-transistor circuit in Kobayashi with the superior one from Shirasaki.
- Expectation of Success: A POSA would have had a reasonable expectation of success because both references are in the same technical field of AMOLED displays. The proposed modification was presented as a simple substitution of one known circuit for another, with Shirasaki’s teachings indicating predictable improvements.
Ground 2: Claims 1-3 and 5-13 are obvious over Childs in view of Shirasaki
- Prior Art Relied Upon: Childs (International Publication No. WO 03/079441) and Shirasaki (Application # 2004/0113873).
- Core Argument for this Ground: This ground presented a similar argument to Ground 1, but used Childs as the primary reference. Petitioner argued Childs disclosed an AMOLED display with projecting "feed" and "select" type interconnections but, like Kobayashi, used a conventional two-transistor pixel circuit. The same motivation to substitute Shirasaki's superior three-transistor circuit was asserted to render the claims obvious.
- Prior Art Mapping: Childs was alleged to disclose an AMOLED display with a "circuit substrate" and projecting "conductive barrier material" that functions as the claimed "interconnections." These interconnections were shown to connect to a "supply line" and an "addressing line," corresponding to the "feed" and "select" interconnections of the ’338 patent. Like Kobayashi, Childs taught a two-transistor (drive and addressing) pixel circuit. Shirasaki was again relied upon to teach the claimed three-transistor circuit, including the "holding transistor."
- Motivation to Combine: The motivation was identical to that in Ground 1. Petitioner contended that a POSA, aware of the known problems with two-transistor circuits as detailed in Shirasaki, would have been motivated to incorporate Shirasaki's improved three-transistor circuit into the display taught by Childs to enhance performance and achieve more stable luminance control.
- Expectation of Success: The expectation of success was based on the same reasoning as Ground 1. Childs and Shirasaki operate in the same field, and the combination represented a predictable substitution of known components to achieve a known benefit.
4. Key Claim Construction Positions
- "transistor array substrate": Petitioner proposed that this term should be construed to mean the entire layered structure on which the pixel electrodes are formed, extending from the bottommost insulating substrate up to and including the topmost insulating layer upon which the pixel electrodes are arrayed. This construction was central to mapping prior art structures where transistors are embedded in lower layers.
- "interconnections which are formed to project from a surface of the transistor array substrate": Petitioner argued this term means interconnections that are formed to extend above the upper surface of the topmost layer of the defined "transistor array substrate." This construction was crucial for demonstrating that the "auxiliary wiring" of Kobayashi and the "conductive barriers" of Childs met the claimed structural limitation.
5. Relief Requested
- Petitioner requests institution of an inter partes review and cancellation of claims 1-3 and 5-13 of the ’338 patent as unpatentable.
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