PTAB
IPR2020-01436
NetApp Inc v. Proven Networks LLC
Key Events
Petition
Table of Contents
petition
1. Case Identification
- Case #: IPR2020-01436
- Patent #: 7,450,507
- Filed: August 17, 2020
- Petitioner(s): NetApp, Inc.
- Patent Owner(s): Proven Networks, LLC
- Challenged Claims: 1-20
2. Patent Overview
- Title: Rate-Limiting a Traffic Stream Using a Rate-Limit Hierarchy
- Brief Description: The ’507 patent discloses a technique for managing network traffic using a hierarchical rate-limiting scheme. The system allows a "child" traffic classification to borrow available bandwidth from its "parent" classification by implementing an "infinity rate-limit rule" that grants an automatic pass at the child level, making the parent-level rate-limit check determinative of the overall outcome.
3. Grounds for Unpatentability
Ground 1: Obviousness over Berger and Kiremidjian - Claims 1-9 and 13-19 are obvious over Berger in view of Kiremidjian.
- Prior Art Relied Upon: Berger (Patent 5,274,644) and Kiremidjian (Application # 2003/0081623).
- Core Argument for this Ground:
- Prior Art Mapping: Petitioner argued that Berger taught the core functionality of the ’507 patent’s hierarchical rate-limiting method. Berger’s system used individual "class banks" (second-level rate-limit) and a shared "common bank" for a group of classes (first-level rate-limit) to manage bandwidth. The petition asserted that Berger’s method of allowing a packet that fails its class bank check to proceed to the common bank check constituted the claimed "infinity rate-limit check," which grants an "automatic pass" to the packet from the second-level check. The ultimate outcome is determined by the common bank (first-level check), which Petitioner mapped to the claimed "overall pass." Kiremidjian was argued to supply the missing hardware and parallel processing elements, disclosing a hardware architecture with a traffic shaping (TS) cell that simultaneously checks multiple rate limits in a single clock cycle.
- Motivation to Combine: Petitioner contended that a person of ordinary skill in the art (POSITA) would have been motivated to implement Berger's older, software-based bandwidth-sharing scheme using a modern, efficient hardware architecture like Kiremidjian’s. The motivation stemmed from the significant increase in network speeds (e.g., Gigabit Ethernet) and the rise of latency-sensitive traffic (e.g., VoIP) in the time between the two references, which created a need for faster, parallel packet processing that Kiremidjian’s hardware architecture provided.
- Expectation of Success: The petition asserted a POSITA would have had a high expectation of success. Both references addressed hierarchical traffic classification and the application of multiple rate limits. Implementing Berger's known rate-limiting logic within Kiremidjian's specialized hardware architecture was presented as a straightforward combination that would predictably result in a more efficient system.
Ground 2: Obviousness over Berger, Kiremidjian, and Chow - Claims 1-20 are obvious over Berger in view of Kiremidjian and Chow.
- Prior Art Relied Upon: Berger (Patent 5,274,644), Kiremidjian (Application # 2003/0081623), and Chow (Patent 6,438,134).
- Core Argument for this Ground:
- Prior Art Mapping: This ground incorporated the arguments from Ground 1 for claims 1-9 and 13-19. For the remaining claims (10-12 and 20), which require assigning and using rate-limiting priority information, Petitioner introduced Chow. Chow was argued to teach a solution for mediating competing requests for shared bandwidth—a problem a POSITA would recognize in Berger's system. Chow disclosed assigning "weights" to different traffic classes to control their priority when accessing idle bandwidth. For example, Chow taught assigning an "infinite weight" to high-priority traffic (e.g., real-time video), ensuring it is serviced before lower-priority traffic. Petitioner argued this directly maps to the claimed "assigning rate-limiting priority information" to prioritize packet handling. Kiremidjian's disclosure of a "marker" that inserts Differentiated Services (DiffServ) code points was identified as a well-known mechanism for implementing Chow's priority scheme in hardware.
- Motivation to Combine: The motivation to add Chow to the Berger/Kiremidjian combination was to solve a problem inherent in Berger's system: fair allocation of bandwidth when multiple traffic classes compete for tokens from the shared "common bank." Petitioner argued that Chow provided an obvious solution by teaching a priority mechanism (weights) to manage such competition. A POSITA would have combined Chow’s priority scheme with the Berger/Kiremidjian architecture to improve performance, especially for latency-sensitive applications, by ensuring that high-priority traffic receives preferential access to shared resources.
- Expectation of Success: Petitioner argued the combination was predictable. Berger and Chow both address multi-level rate-limiting and reallocation of idle bandwidth. Applying Chow's well-known weighted fair queuing principles to Berger's system, as implemented in Kiremidjian's hardware, was presented as a straightforward design choice with a predictable outcome of proportional bandwidth allocation based on assigned priorities.
4. Arguments Regarding Discretionary Denial
- The petition argued that discretionary denial under 35 U.S.C. §314(a) based on the Fintiv factors would be improper. Petitioner asserted that the co-pending district court litigation was in its earliest stages, with no trial date set, minimal investment by the parties, and no claim construction or invalidity contentions exchanged. Further, Petitioner argued that the prior art references relied upon in the petition were not considered during the original prosecution, weighing in favor of institution to assess patentability on a stronger record.
5. Relief Requested
- Petitioner requested institution of an inter partes review and cancellation of claims 1-20 of Patent 7,450,507 as unpatentable under 35 U.S.C. §103.
Analysis metadata