PTAB

IPR2020-01484

Xilinx Inc v. Analog Devices

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Petition

1. Case Identification

2. Patent Overview

  • Title: Randomly Interleaved Analog-to-Digital Converter (ADC) with Mismatch Correction
  • Brief Description: The ’750 patent discloses interleaved analog-to-digital converter (ADC) systems that use random clock signals to randomly select individual ADCs for conversion. The systems also employ offset and gain correction circuitry to mitigate performance degradation caused by mismatches between the parallel converter circuits.

3. Grounds for Unpatentability

Ground 1: Obviousness over Eklund and Jamal - Claims 10-11, 13-14, 16-17, 19-20, 23-30, 32, and 35-43 are obvious over Eklund in view of Jamal.

  • Prior Art Relied Upon: Eklund (Patent 6,392,575) and Jamal (a December 2002 article in the IEEE Journal of Solid-State Circuits).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Eklund taught the core invention of a randomly interleaved ADC system. Specifically, Eklund disclosed a parallel ADC architecture with a time control unit that uses a random number generator to select the active conversion channel, thereby meeting limitations like "a plurality of converter circuits clocked by a random clock" (claim 10). Petitioner asserted that Jamal taught the missing element: digital background calibration circuits to correct for offset and gain mismatches in interleaved ADCs. Jamal’s disclosure of an "offset sensing circuit" that measures and corrects for offset in each channel allegedly rendered the corresponding limitation of claim 10 obvious.
    • Motivation to Combine: Petitioner contended a person of ordinary skill in the art (POSITA) would combine Jamal’s well-known mismatch correction techniques with Eklund’s randomly interleaved ADC system. The motivation was to solve the known problem of performance degradation from offset/gain mismatch in interleaved systems. Combining these known elements would predictably improve system performance, such as the signal-to-noise and distortion ratio (SNDR), by addressing different sources of error—random interleaving (Eklund) spreads mismatch-induced spurs, while calibration (Jamal) removes the underlying offset/gain errors.
    • Expectation of Success: Petitioner argued that a POSITA would have a high expectation of success. Jamal provided experimental results from a prototype chip, demonstrating that its feedback-based correction circuitry was functional and operated in a predictable manner, confirming its suitability for integration into a system like Eklund’s.

Ground 2: Obviousness over Eklund, Jamal, and Ferragina - Claims 15, 18, 21, and 22 are obvious over Eklund and Jamal in view of Ferragina.

  • Prior Art Relied Upon: Eklund (Patent 6,392,575), Jamal (a 2002 IEEE article), and Ferragina (a 2003 symposium proceeding).
  • Core Argument for this Ground:
    • Prior Art Mapping: This ground built upon the combination of Eklund and Jamal by adding Ferragina to address specific dependent claims. Petitioner asserted that Ferragina taught an alternative offset correction technique where, instead of correcting each channel to an absolute zero offset (as in Jamal), the offset of each channel is corrected to match the offset of a single reference path. This technique, which involves sensing the difference between a channel and the reference path, allegedly taught the limitations of claims 18 ("each converter circuit... is corrected to said offset signal of one converter circuit") and 21 ("sensing a difference between said first and second offset signals").
    • Motivation to Combine: A POSITA, seeking to reduce offset mismatch and avoid spurious tones, would have recognized Ferragina’s reference-path method as a known and viable alternative to Jamal’s zero-offset method. Petitioner argued that substituting or combining Ferragina’s technique with the Eklund/Jamal system was a simple substitution of one known element for another to achieve the same predictable result of improved performance.
    • Expectation of Success: Ferragina demonstrated the successful application of its offset correction technique to a functional interleaved ADC system implemented on an integrated circuit, providing a POSITA with a reasonable expectation of success.

Ground 3: Obviousness over Eklund, Jamal, and Agazzi - Claims 27-28, 31, 37, 40, and 42 are obvious over Eklund and Jamal in view of Agazzi.

  • Prior Art Relied Upon: Eklund (Patent 6,392,575), Jamal (a 2002 IEEE article), and Agazzi (Patent 7,245,638).
  • Core Argument for this Ground:
    • Prior Art Mapping: This ground added Agazzi to the Eklund/Jamal combination to address claims related to gain correction. Petitioner argued that Agazzi taught a path-specific Automatic Gain Control (AGC) circuit for interleaved systems. This circuit addressed gain mismatch by measuring the output amplitude of each channel (a gain proxy), comparing it to a desired amplitude, and adjusting the gain of the channel via a feedback loop. This allegedly disclosed limitations such as a "gain corrector" that provides a "difference between said first and second gains" (claim 27) and includes a "filter and a rectifier" (claim 31, referring to Agazzi's lowpass filter and absolute value block).
    • Motivation to Combine: Petitioner asserted that gain mismatch was a well-known problem in interleaved ADCs. A POSITA would have been motivated to incorporate Agazzi's sophisticated AGC solution into the Eklund/Jamal system to reduce gain errors. This was presented as the application of a known technique (Agazzi's AGC) to improve a similar device (Eklund/Jamal's interleaved ADC) in a predictable way.
    • Expectation of Success: Agazzi’s detailed disclosure of a specific AGC implementation for reducing gain errors in interleaved paths would have provided a POSITA with a clear path to implementation and a reasonable expectation of success.

4. Relief Requested

  • Petitioner requested the institution of an inter partes review and the cancellation of claims 10-11, 13-32, and 35-43 of Patent 6,900,750 as unpatentable.