PTAB

IPR2020-01559

Xilinx Inc v. Analog Devices Inc

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Petition
petition

1. Case Identification

2. Patent Overview

  • Title: Analog-to-Digital Converter with Dither Application
  • Brief Description: The ’075 patent discloses analog-to-digital converters (ADCs) using switched capacitor arrays. The technology involves using a first group of capacitors for sampling an input signal and a separate, second group of capacitors to apply a known charge perturbation, such as dither, onto the stored charge to improve the ADC's accuracy and reduce nonlinearity.

3. Grounds for Unpatentability

Ground 1: Obviousness over a Single Perturbation Reference - Claims 16-17 are obvious over Confalonieri.

  • Prior Art Relied Upon: Confalonieri (Patent 6,600,437).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Confalonieri taught an ADC comprising a main switched capacitor array for sampling and converting an input signal, which met the limitations for the "first group" of capacitors. Confalonieri also disclosed a separate switched capacitor digital-to-analog converter (DAC), its CATT array, used to provide an offset. Petitioner contended this offset constitutes a "perturbation" as recited in independent claim 16, and because this CATT array is separate from the main array and does not receive the input signal, it met the key limitations of the claim.
    • Motivation to Combine (for §103 grounds): As a single-reference ground, the obviousness argument centered on predictable design choices. Petitioner asserted it would have been obvious to a person of ordinary skill in the art (POSITA) to provide the offset perturbation before the successive approximation register (SAR) bit test is performed, as this timing is necessary for the perturbation to have its intended effect.
    • Expectation of Success (for §103 grounds): A POSITA would have had a reasonable expectation of success because applying a known perturbation technique within a standard ADC architecture was a predictable and well-understood design modification.

Ground 2: Obviousness over Confalonieri and Hiller - Claims 1-7, 9, 10, and 12-25 are obvious over Confalonieri in view of Hiller.

  • Prior Art Relied Upon: Confalonieri (Patent 6,600,437), Hiller (Patent 4,550,309).
  • Core Argument for this Ground:
    • Prior Art Mapping: This ground built upon the teachings of Confalonieri by addressing the specific "dither" limitation in other independent claims. Confalonieri provided the primary ADC structure with a main capacitor array (first group) and a separate capacitor array for "further functions" (second group). Hiller taught that applying dither via a pseudo-random noise (PRN) source to an ADC was a well-known technique for enhancing linearity. The combination of Confalonieri's separate capacitor array with Hiller's dither function and PRN source was alleged to meet all limitations of the challenged claims.
    • Motivation to Combine (for §103 grounds): A POSITA would combine these references because Confalonieri explicitly stated that its separate capacitor array could be used for "further functions, such as an offset compensation," providing a clear suggestion to implement other known functions. Applying the well-known dither technique from Hiller to improve linearity would be a logical and motivated implementation of such a "further function" to achieve predictable performance benefits.
    • Expectation of Success (for §103 grounds): Simply applying a known technique (Hiller's dither) to a known device (Confalonieri's ADC) that was ready for improvement would yield the predictable result of improved ADC performance.

Ground 3: Obviousness over Cai and Bjornsen - Claims 1-5, 7, and 9-22 are obvious over Cai in view of Bjornsen.

  • Prior Art Relied Upon: Cai (Patent 6,914,550), Bjornsen (Patent 7,129,847).
  • Core Argument for this Ground:
    • Prior Art Mapping: This ground presented an alternative combination based on pipelined ADC architectures. Petitioner asserted that Cai disclosed a pipelined ADC using switched capacitor SAR stages, which provided the claimed "first group of capacitors" for sampling and conversion. Bjornsen disclosed a pipelined ADC circuit that explicitly included a separate switched capacitor "Dither DAC" controlled by a digital dither generator. This combination provided the claimed "second group of capacitors" for applying dither and the "sequence generator" for controlling it.
    • Motivation to Combine (for §103 grounds): A POSITA would combine the separate dither DAC from Bjornsen with the SAR ADC of Cai to gain the known desirable benefits of applying dither in a high-performance ADC. Bjornsen's architecture showed how a separate dither DAC could facilitate precise control over the dither without interfering with the primary feedback and conversion capacitors, a known design goal.
    • Expectation of Success (for §103 grounds): The combination involved implementing a known functional block (a dither DAC) into a compatible ADC architecture to achieve a predictable improvement in performance, which a POSITA would have reasonably expected to succeed.
  • Additional Grounds: Petitioner asserted additional obviousness challenges for specific claims based on combinations of Confalonieri, Hiller, Hester, and Bjornsen, as well as Cai, Bjornsen, and Hester, which relied on similar motivations to add known error correction or fine-tuning dither techniques.

4. Arguments Regarding Discretionary Denial

  • Petitioner argued against discretionary denial under Fintiv, asserting that the co-pending district court trial was scheduled for March 14, 2022, more than 18 months after the petition filing, leaving sufficient time for a Final Written Decision to issue before trial. Petitioner also stated its intent to seek a stay, argued the petition was filed expeditiously after receiving infringement contentions, and contended that the IPR challenges claims not asserted in the parallel litigation, thereby reducing the overlap between the proceedings.

5. Relief Requested

  • Petitioner requests institution of an inter partes review and cancellation of claims 1-25 of the ’075 patent as unpatentable.