Analog Devices Inc v. Xilinx Inc

1. Case Identification

• Case #: IPR2020-01624
• Patent #: 6,975,132
• Filed: September 15, 2020
• Petitioner(s): Analog Devices, Inc.
• Patent Owner(s): Xilinx, Inc.
• Challenged Claims: 1-18

2. Patent Overview

• Title: DAC Based Driver with Selectable Pre-Emphasis Signal Levels
• Brief Description: The ’132 patent discloses a programmable high-speed serial transmission line (Tx) driver designed to support multiple communication protocols. The driver includes circuitry for the programmable selection of both primary and pre-emphasis current levels to counteract signal attenuation on transmission lines.

3. Grounds for Unpatentability

Ground 1: Anticipation - Claims 1, 5, 12, 13, and 18 are anticipated by Groen

• Prior Art Relied Upon: Groen (Patent 6,437,599).
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner argued that Groen, whose sole inventor is the first-named inventor of the ’132 patent, discloses every limitation of the challenged claims. Groen teaches a programmable output driver circuit with separate, selectable primary and pre-emphasis current levels. Petitioner mapped Groen’s primary current driver (210) and pre-emphasis current driver (220) to the corresponding claim limitations. It further asserted that Groen’s digital-to-analog converters (DACs), specifically dac4_top (400) and dac_emp_top (402), function as the claimed "primary current selection module" and "pre-emphasis current selection module," respectively. These modules are independent, as they receive separate digital input codes (idrv<4:0> and empctrl<2:0>) to generate distinct reference currents, thus anticipating the core functionality of independent claim 1. Dependent claims were argued to be met by Groen's disclosure of logic for generating pre-emphasis signals (inverters) and differential driver pairs.

Ground 2: Obviousness over Core Driver References - Claims 1, 2, 5-7, 12, 13, and 16-18 are obvious over Gauthier in view of Groen

• Prior Art Relied Upon: Gauthier (Patent 6,377,076) and Groen (Patent 6,437,599).
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner asserted that Gauthier discloses the basic architecture of a Tx line driver with separate primary and pre-emphasis current drivers (drivers 56 and 58) and pre-drivers (54 and 55), similar to the ’132 patent. However, Gauthier does not explicitly disclose that the current levels are selectable or programmable. Groen was argued to supply this missing element, as it expressly teaches a Tx line driver with selectable and programmable primary and pre-emphasis current levels to support various communication modes (e.g., PECL, CML, LVDS).
  • Motivation to Combine: A person of ordinary skill in the art (POSITA) would combine Gauthier with Groen to gain the benefits of programmability described in Groen. Groen identified a need for driver circuits that can adapt to numerous data communication modes, a problem inherent in the fixed-configuration drivers like Gauthier's. Implementing Groen’s programmable features into Gauthier’s well-known driver structure would have been a straightforward adaptation to create a more versatile and commercially desirable driver.
  • Expectation of Success: A POSITA would have a high expectation of success because Groen’s programmable current drivers could be bodily incorporated into Gauthier’s architecture. The inputs to Gauthier’s drivers could be connected to the outputs of Groen’s programmable bias circuitry with no significant modification, as both references utilize standard driver circuit topologies.

Ground 3: Obviousness over Gauthier, Groen, and Huang - Claims 3, 4, 8-11, 14, and 15 are rendered obvious by Gauthier combined with Groen and Huang

• Prior Art Relied Upon: Gauthier (Patent 6,377,076), Groen (Patent 6,437,599), and Huang (Patent 5,870,049).
• Core Argument for this Ground:
  • Prior Art Mapping: This ground built upon the combination of Gauthier and Groen to address claims requiring specific DAC implementations, such as using current mirrors and pluralities of scaled devices. While the ’132 patent and Groen depict these DACs conceptually, Huang was argued to disclose the specific, well-known implementation details. Huang teaches a current mode DAC that uses a current mirror with a plurality of scaled, binary-weighted MOSFET devices (transistors 22) that are selectively coupled based on digital control signals to generate a selectable reference current. This circuitry was alleged to be effectively identical to that claimed.
  • Motivation to Combine: A POSITA, seeking to implement the programmable DACs taught by Groen within the Gauthier driver architecture, would have been motivated to look to a known, efficient DAC design like that in Huang. Huang explicitly states that for low-resolution applications—such as the 3-bit and 5-bit DACs in Groen—current mode DACs are "very fast and accurate" and "near ideal." This would have provided a strong reason to use Huang’s established design to implement the functionality described in Groen.
  • Expectation of Success: The combination was asserted to be predictable, as it involved implementing a known functional block (a programmable DAC) using a standard, well-documented circuit design (Huang's current-mode DAC).
• Additional Grounds: Petitioner asserted additional obviousness challenges based on combinations including Shumarayev (Patent 6,940,302) as an alternative way to teach a DAC configuration identical to that shown in the ’132 patent.

4. Key Claim Construction Positions

• Petitioner argued that terms such as "primary current selection module" (claim 1), "pre-emphasis current selection module" (claim 1), and "current selection module" (claim 12) are recited in purely functional language and should be construed as means-plus-function limitations under §112, para. 6.
• The claimed function for these modules was identified as generating a selectable reference current. The corresponding structure disclosed in the ’132 patent specification for performing this function was argued to be a digital-to-analog converter (DAC). Petitioner contended the prior art discloses this structure regardless of the construction applied.

5. Arguments Regarding Discretionary Denial

• Petitioner argued that discretionary denial under §314(a) based on Fintiv factors was not appropriate. It contended that the co-pending district court litigation was at an early stage and that the trial was scheduled for March 28, 2022, which was after a Final Written Decision would issue in the inter partes review (IPR). Furthermore, Petitioner noted that the presiding judge in the litigation typically stays cases when a corresponding IPR is instituted.

6. Relief Requested

• Petitioner requests institution of an IPR and cancellation of claims 1-18 of the ’132 patent as unpatentable.