Google LLC v. Singular Computing LLC

1. Case Identification

• Case #: IPR2021-00165
• Patent #: 9,218,156
• Filed: November 5, 2020
• Petitioner(s): Google LLC
• Patent Owner(s): Singular Computing LLC
• Challenged Claims: 1-8, 16, and 33

2. Patent Overview

• Title: Low Precision High Dynamic Range Processor
• Brief Description: The ’156 patent discloses a device with a “low precision high dynamic range” (LPHDR) execution unit. This unit is designed to perform arithmetic operations, such as multiplication, by intentionally reducing precision to save power and computational resources, while still supporting a high dynamic range of numerical values, particularly in floating-point systems.

3. Grounds for Unpatentability

Ground 1: Obviousness over Dockser - Claims 1-2 and 16 are obvious over Dockser.

• Prior Art Relied Upon: Dockser (Application # 2007/0203967).
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner argued that Dockser disclosed all elements of the challenged claims. Dockser taught a floating-point processor (FPP) that performs operations at a selectable, reduced precision to conserve power. Petitioner asserted this FPP is an LPHDR execution unit as it operates on standard IEEE-754 32-bit floating-point numbers, which inherently have a high dynamic range meeting the claim requirements. The key claimed imprecision limitations (a relative error Y of at least 0.05% for a fraction X of at least 5% of inputs) were allegedly met by Dockser’s technique of “bit-dropping”—selectively de-powering circuits for least-significant mantissa bits. Petitioner provided software demonstrations and algebraic analysis to show that retaining only 9 mantissa bits, as exemplified in Dockser, results in error rates exceeding the claimed thresholds.
  • Key Aspects: Petitioner contended that for a deterministic digital circuit like Dockser's, the "statistical mean" of repeated operations is simply the output of a single, repeatable operation.

Ground 2: Obviousness over Dockser and Tong - Claims 1-2, 16, and 33 are obvious over Dockser in view of Tong.

• Prior Art Relied Upon: Dockser (Application # 2007/0203967) and Tong (an IEEE Transactions on VLSI Systems publication, June 2000).
• Core Argument for this Ground:
  • Prior Art Mapping: This ground built upon the teachings of Dockser by adding Tong. Tong addressed the same problem of reducing power in floating-point arithmetic by reducing precision. Tong taught how to empirically determine the optimal number of mantissa bits for specific applications (e.g., speech recognition) to save power without significantly degrading accuracy, demonstrating that as few as 5 mantissa bits could be sufficient. The combination allegedly met claim 33, which recites emulating an LPHDR device in software, as Tong explicitly taught emulating different bit-width FPPs in software to test accuracy.
  • Motivation to Combine: A POSITA would combine Tong's teachings on optimized precision levels with Dockser's selectable-precision FPP. Both references target power reduction in floating-point units via precision reduction. A POSITA would have been motivated to configure Dockser’s FPP to the more aggressive, empirically-validated precision levels taught by Tong (e.g., 5 mantissa bits) to achieve even greater power savings in the types of mobile applications discussed in both references.
  • Expectation of Success: A POSITA would have had a high expectation of success, as the combination involved applying a known optimization technique (Tong's bit-width analysis) to a known, compatible system (Dockser's FPP) to achieve the predictable benefit of enhanced power savings.

Ground 3: Obviousness over Dockser and MacMillan - Claims 1-8 and 16 are obvious over Dockser in view of MacMillan.

• Prior Art Relied Upon: Dockser (Application # 2007/0203967) and MacMillan (Patent 5,689,677).

• Core Argument for this Ground:

  • Prior Art Mapping: This ground addressed claims requiring a large number of execution units (e.g., claim 3, which requires over 100). MacMillan disclosed a Single Instruction Multiple Data (SIMD) parallel processing architecture to provide "supercomputer performance" in personal computers. This architecture used a plurality of parallel "floating point accelerators." This ground asserted that the combination of Dockser and MacMillan met the limitations of claim 3, which recites a device where the number of LPHDR units exceeds the number of traditional-precision units by at least 100.
  • Motivation to Combine: A POSITA would have been motivated to implement the "floating-point accelerators" in MacMillan's parallel architecture using Dockser's power-efficient FPPs. This would achieve the dual benefits of increased performance speed from parallelization (per MacMillan) and reduced power consumption (per Dockser), a common and well-understood engineering trade-off.
  • Expectation of Success: The combination was a predictable substitution of one known component (a power-efficient FPP) for another (a generic FPP) within a known architecture (a SIMD system) to combine their respective, known advantages.

• Additional Grounds: Petitioner asserted a further obviousness challenge (Ground 4) against claims 1-8, 16, and 33 based on the combination of Dockser, Tong, and MacMillan, arguing it would be obvious to implement the parallel processors of MacMillan with the power-saving FPPs of Dockser, further optimized to the aggressive precision levels taught by Tong.

4. Arguments Regarding Discretionary Denial

• §314(a) Fintiv Factors: Petitioner argued against discretionary denial under Fintiv, asserting that the petition was filed diligently and early in the parallel district court litigation. Key factors weighing against denial included that no trial date had been set, investment in the litigation on validity issues was minimal as invalidity contentions were not yet due, and the petition challenged claims not asserted in the parallel case.
• §325(d) Same or Substantially Same Art: Petitioner argued that denial under §325(d) was inappropriate because all primary references relied upon (Dockser, Tong, MacMillan) were new and had not been considered by the examiner during the original prosecution.

5. Relief Requested

• Petitioner requested institution of an inter partes review and cancellation of claims 1-8, 16, and 33 of the ’156 patent as unpatentable.