Intel Corp v. ParkerVision Inc

1. Case Identification

• Case #: IPR2021-00346
• Patent #: 8,190,108
• Filed: January 14, 2021
• Petitioner(s): Intel Corporation
• Patent Owner(s): ParkerVision, Inc.
• Challenged Claims: 1, 6-9, 12, 17-20

2. Patent Overview

• Title: Frequency Up-Conversion
• Brief Description: The ’108 patent describes a method and system for up-converting a lower-frequency information signal to a higher frequency for wireless transmission. The asserted novelty involves using a switch controlled by an oscillating signal that has a frequency lower than, and a sub-harmonic of, the desired higher output frequency, which purportedly reduces cost and power consumption.

3. Grounds for Unpatentability

Ground 1: Claims 1 and 12 are obvious over Downey in view of Sedra.

• Prior Art Relied Upon: Downey (Patent 5,239,686) and Sedra ("Microelectronic Circuits," Third Edition, 1991).
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner argued that Downey, which issued five years before the ’108 patent’s priority date, discloses the same up-conversion technique. Downey teaches a transceiver that generates a modulated oscillating signal from a voltage-controlled oscillator (VCXO), where the signal’s frequency is a sub-harmonic (specifically, one-third) of the desired final transmit frequency. This sub-harmonic signal controls a "frequency tripler" to up-convert the signal. Petitioner asserted that Downey’s "frequency tripler" includes an inverter (U5A) that performs the function of the "first switch" recited in claim 1. To explicitly supply the "switch" limitation, Petitioner relied on Sedra, a well-known textbook on microelectronics. Sedra expressly teaches that an "inverter is basically a voltage-controlled switch," and describes its structure and function in a manner analogous to the switch in the ’108 patent. Petitioner contended that Downey also discloses the other elements of claim 1, including routing signals via second and third switches for input and antenna transmission, respectively.
  • Motivation to Combine: A person of ordinary skill in the art (POSITA), when analyzing the circuit in Downey, would have understood that its inverter functions as a switch. A POSITA would be motivated to consult a standard textbook like Sedra to understand the structure and operation of a basic component like an inverter. Sedra provides the explicit disclosure that an inverter is a switch, confirming what a POSITA would have already known and providing a clear rationale for implementing Downey’s inverter with a switch structure.
  • Expectation of Success: A POSITA would have a high expectation of success, as the combination involves applying a fundamental, well-known definition from a textbook (Sedra) to understand a component within a disclosed system (Downey). This is a straightforward application of known principles, not an unpredictable modification.

Ground 2: Claims 6-9 and 17-20 are obvious over Downey, Sedra, and Hahnel.

• Prior Art Relied Upon: Downey (Patent 5,239,686), Sedra ("Microelectronic Circuits," Third Edition, 1991), and Hahnel (Patent 2,730,624).
• Core Argument for this Ground:
  • Prior Art Mapping: This ground adds Hahnel to the Downey/Sedra combination to teach the limitations of dependent claims 6-9 and 17-20, which further require a "pulse shaper." The ’108 patent describes a pulse shaper for "harmonic enhancement"—transforming a sinusoidal control signal into a string of sharp pulses to make the up-conversion switch operate more quickly and enhance the amplitude of the desired output harmonic. Petitioner argued Hahnel, a 1956 patent, explicitly addresses this same problem. Hahnel discloses a "pulse shaper" that receives a sinusoidal signal and outputs a "substantially square-shaped voltage wave" (a string of pulses). This pulse-shaped signal is then used to control a frequency multiplier circuit to produce an up-converted signal with a stronger, more emphasized desired harmonic.
  • Motivation to Combine: A POSITA seeking to improve the up-conversion efficiency of the Downey/Sedra circuit would be motivated to incorporate Hahnel’s pulse shaper. Hahnel explicitly teaches the benefit of using a pulse shaper to solve the problem of insufficient signal amplitude in frequency multiplier circuits, a known issue at the time. A POSITA would combine Hahnel with Downey/Sedra to achieve the predictable result of an improved up-conversion circuit that produces a stronger output signal. Hahnel further teaches placing the pulse shaper between the oscillator and the frequency multiplier, providing a clear roadmap for its integration into the Downey architecture.
  • Expectation of Success: A POSITA would have a high expectation of success because Hahnel provides a known solution to a known problem in the same technical field. The combination involves integrating a known functional block (Hahnel's pulse shaper) into a known system (Downey's transceiver) in the exact manner taught by the prior art to achieve a predictable improvement.

4. Key Claim Construction Positions

• Petitioner argued that no claim terms required construction because the prior art disclosed the challenged limitations under any plausible interpretation.
• For key terms disputed in parallel litigation, such as "pulse shaper" and "control signal," Petitioner contended that the combination of Downey, Sedra, and Hahnel rendered the claims obvious under both its own and the Patent Owner's proposed constructions. For example, Hahnel’s disclosure met both the broader construction of a "circuitry that generates a string of pulses" and the narrower construction of a circuit that "enhance[s] a desired harmonic."

5. Arguments Regarding Discretionary Denial

• Petitioner argued that discretionary denial under §314(a) and the Fintiv factors would be inappropriate. The petition was filed expeditiously, just six months after the complaint was served.
• The co-pending district court litigation was in its early stages: no Markman hearing had been held, fact discovery was stayed, and the trial was scheduled for March 2022 at the earliest, making its timing uncertain relative to the IPR’s statutory deadline for a Final Written Decision.
• Petitioner further highlighted the strength of its invalidity grounds, arguing that Downey discloses the core of the claimed invention and was never substantively considered during prosecution, despite being buried in an Information Disclosure Statement.

6. Relief Requested

• Petitioner requests institution of an inter partes review and cancellation of claims 1, 6-9, 12, and 17-20 of the ’108 patent as unpatentable.