PTAB

IPR2021-00350

Astronics Test Systems Inc v. TERadyne Inc

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Petition
petition

1. Case Identification

2. Patent Overview

  • Title: Automatic Test Equipment with Over-Voltage and Test Condition Monitoring
  • Brief Description: The ’479 patent relates to automatic test equipment (ATE) for testing a unit-under-test (UUT). The ATE includes a channel circuit with at least two comparison sub-circuits and associated control circuitry configured to simultaneously monitor for both normal operating conditions (pass/fail) and over-voltage conditions using distinct, user-programmable thresholds for each monitoring function.

3. Grounds for Unpatentability

Ground 1: Obviousness of Claims 1-13 over Schinabeck

  • Prior Art Relied Upon: Schinabeck (Patent 4,635,259).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Schinabeck, which discloses automated electronic test equipment for testing a device-under-test (DUT), teaches all limitations of the challenged claims. Schinabeck described a system with multiple "pin electronics interface circuits" (channel circuits), each including comparator circuits to compare a response signal from the DUT to a "programmed reference level." Petitioner asserted Schinabeck’s "test system controller" receives outputs from these comparators and generates pass/fail signals. This controller fulfills the claimed function of providing both a "test output" and an "over-voltage output" by using different comparators with distinct, programmable reference levels—one set for standard pass/fail testing and another set for detecting damaging voltage overshoots.
    • Key Aspects: The core of the argument was that because Schinabeck taught a system with multiple comparators and programmable thresholds, it would have been an obvious design choice for a person of ordinary skill in the art (POSITA) to configure the existing hardware to monitor for two different conditions (test and over-voltage) simultaneously.

Ground 2: Obviousness of Claims 1-7 and 9-13 over Miyamoto in view of Frame

  • Prior Art Relied Upon: Miyamoto (Patent 6,292,342) and Frame (Patent 6,856,158).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner asserted that Miyamoto discloses a voltage protection circuit for a semiconductor test system that includes both an "abnormal voltage detection" function (the over-voltage circuit) and a conventional test circuit with comparators for pass/fail testing. To the extent Miyamoto lacks the specific control circuitry for managing and generating distinct outputs from both sets of comparators as claimed, Frame was argued to supply this element. Frame discloses control circuitry, including a test processor and logic comparator, that receives and processes outputs from multiple analog comparators to determine test results and store failures.
    • Motivation to Combine: A POSITA would combine Miyamoto and Frame for several reasons. First, Miyamoto expressly stated its voltage protection circuit is "usually provided in connection with" conventional test equipment like that disclosed in Frame. Second, both references are in the same field of semiconductor testing, are from the same time period, and were assigned to the same company. Third, since both references teach incorporating additional voltage detection circuits into existing test systems, their combination represented a predictable application of known techniques to achieve a known benefit.
    • Expectation of Success: The proposed modification was characterized as the routine integration of a known type of protection circuit (Miyamoto) into a conventional test system (Frame), which would predictably yield the combined functionality with a high expectation of success.

Ground 3: Obviousness of Claim 8 over Miyamoto in view of Frame and Schinabeck

  • Prior Art Relied Upon: Miyamoto (Patent 6,292,342), Frame (Patent 6,856,158), and Schinabeck (Patent 4,635,259).
  • Core Argument for this Ground:
    • Prior Art Mapping: This ground built upon the combination of Miyamoto and Frame to argue the obviousness of claim 8, which adds the limitation of a "low pass filter and/or delay element coupled between the over-voltage output and the comparison outputs." Petitioner alleged that while the Miyamoto and Frame combination established the base invention, Schinabeck taught this specific additional element. Schinabeck discloses Precision Management Units (PMUs) that incorporate programmable filter settings and delays and are positioned between the comparators and the control system output.
    • Motivation to Combine: A POSITA would be motivated to add the filter/delay element taught by Schinabeck to the Miyamoto/Frame combination to solve the well-known problem of transient, non-damaging signal spikes causing false over-voltage alarms. Adding a filter or delay is a standard engineering solution to improve signal integrity and prevent erroneous triggers. Schinabeck provided a clear example of this technique within a highly analogous ATE system.
    • Expectation of Success: Integrating a standard filter or delay element into a circuit is a fundamental design choice with highly predictable results, ensuring a reasonable expectation of success in achieving a more robust and reliable over-voltage detection system.

4. Arguments Regarding Discretionary Denial

  • Petitioner argued that discretionary denial under Fintiv would be inappropriate and that all relevant factors weighed in favor of institution.
  • Key arguments included that the co-pending district court case was in its infancy, with no trial date set and minimal discovery completed, meaning the Board’s Final Written Decision (FWD) would likely issue well before any trial.
  • Petitioner further committed to stipulating that it would not pursue in district court the same invalidity grounds raised in the IPR, thereby eliminating concerns of inefficiency or overlap.

5. Relief Requested

  • Petitioner requests institution of an inter partes review and cancellation of claims 1-13 of Patent 7,395,479 as unpatentable.