Western Digital Technologies Inc v. Ocean Semiconductor LLC

1. Case Identification

• Case #: IPR2021-00929
• Patent #: 7,080,330
• Filed: May 18, 2021
• Petitioner(s): Western Digital Technologies, Inc.
• Patent Owner(s): Ocean Semiconductor LLC
• Challenged Claims: 19-21

2. Patent Overview

• Title: Concurrent Measurement of Critical Dimension and Overlay in Semiconductor Manufacturing
• Brief Description: The ’330 patent discloses a method for monitoring and controlling a semiconductor wafer fabrication process. The method involves concurrently measuring a critical dimension (CD) and an overlay error on a wafer, generating control data from these measurements, and adjusting fabrication parameters to maintain the CD and overlay within acceptable tolerances.

3. Grounds for Unpatentability

Ground 1: Anticipation of Claims 19-21 by Levy

• Prior Art Relied Upon: Levy (Patent 6,891,627).
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner argued that Levy discloses every limitation of claims 19-21. Levy teaches a method for monitoring and controlling a semiconductor fabrication process by determining at least two properties of a specimen, such as CD and overlay, simultaneously or substantially simultaneously. Levy explicitly discloses processing a "plurality of wafers" and grouping measurement data by "x-y position (or range of x-y positions, such as on a grid), by nearest die," which meets the "mapping...into one or more logical grids" limitation. The patent further teaches generating control data and using feedback or feedforward techniques to alter fabrication parameters when measurements fall outside a "predetermined range," meeting the control-related limitations. For dependent claims, Levy discloses using scatterometry for measurements (claim 20) and a multi-level structure with features on a first level formed above a second level, satisfying the "underlying" and "overlying" grating limitations (claim 21).

Ground 2: Obviousness of Claims 19-21 over Wong in View of Brown

• Prior Art Relied Upon: Wong (Application # 2003/0160163) and Brown (Application # 2002/0072001).
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner asserted that Wong teaches a method for monitoring semiconductor fabrication by using optical metrology on device features themselves to concurrently measure both overlay registration and CDs ("width of features making up the periodic structure"). Wong’s use of periodic structures on device features arranged in an X-Y grid was argued to teach the "mapping" and "concurrent measurement" limitations of claim 19. However, Wong primarily focuses on monitoring and does not explicitly teach controlling the fabrication process. Petitioner argued that Brown remedies this deficiency by disclosing a method of controlling a lithography process by measuring properties like CD and overlay and using a controller to alter process parameters via feedback or feedforward control techniques in response to the measurements.
  • Motivation to Combine: A POSITA would combine Wong's advanced, space-saving measurement technique with Brown's conventional process control method. The primary purpose of monitoring a process (as in Wong) is to enable control (as in Brown) to improve yield, reduce defects, and ensure parameters remain within tolerance. Combining a known measurement method with a known control method to achieve a more robust and efficient overall system was a well-understood goal in the art.
  • Expectation of Success: A POSITA would have a high expectation of success, as the combination merely involved using the measurement outputs from a system like Wong's as inputs for a standard, processor-based control loop as taught by Brown.

Ground 3: Obviousness of Claims 19-21 over Adel in View of Brown

• Prior Art Relied Upon: Adel (Patent 7,804,994) and Brown (Application # 2002/0072001).
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner contended that Adel discloses a method for determining and correcting overlay error during semiconductor processing, including mapping production dies on a wafer into a logical grid and using grating structures. While Adel's focus is on overlay, it explicitly states its methodology "may be extended to other metrologies as for example critical dimension (CD)." Adel, however, does not teach performing overlay and CD measurements concurrently. Petitioner argued that Brown supplies this limitation by teaching the substantial simultaneous measurement of multiple properties, including CD and overlay, using scatterometry.
  • Motivation to Combine: A POSITA would have been motivated to modify Adel's process to incorporate the simultaneous measurement technique of Brown to improve efficiency. Performing both CD and overlay measurements in a single step, as taught by Brown, would reduce time and cost compared to the sequential process implied by Adel. Both Adel and Brown are KLA-Tencor references that use scatterometry to solve similar problems related to shrinking device features, making their teachings readily combinable.
  • Expectation of Success: The combination would have been predictable. It would involve routine programming of a known computer processor to analyze the same scatterometry data set for both CD and overlay information, a technique known to be more efficient.
• Additional Grounds: Petitioner asserted an additional obviousness challenge against claims 19-21 based on Levy alone as a fallback to the anticipation ground, arguing that a POSITA would have found it routine to combine Levy's various disclosed embodiments to arrive at the claimed invention.

4. Arguments Regarding Discretionary Denial

• Petitioner argued that the Board should not issue a discretionary denial under Fintiv because the co-pending district court litigation was in its earliest stages. Key factors cited were the absence of a trial date or substantive scheduling order, the court's minimal investment in the case, and the fact that Petitioner had not yet served invalidity contentions. Petitioner further noted that the IPR challenges claims 20 and 21, which were not asserted in the district court complaint, and stipulated that it would not pursue the same invalidity grounds in district court if the IPR was instituted.

5. Relief Requested

• Petitioner requests institution of an inter partes review and cancellation of claims 19-21 of Patent 7,080,330 as unpatentable.