Intel Corp v. Acqis LLC

1. Case Identification

• Case #: IPR2021-01105
• Patent #: 8,977,797
• Filed: June 25, 2021
• Petitioner(s): Intel Corporation
• Patent Owner(s): Acqis LLC
• Challenged Claims: 1-3, 7-13, 18-20

2. Patent Overview

• Title: Computer System with Modular Components
• Brief Description: The ’797 patent describes a computer system featuring a detachable "attached computer module" (ACM) containing core processing components (CPU, memory, graphics) and a "peripheral console" (PCON) for connecting to peripherals. The modules interface through a high-speed, low-pin-count serial bus (XPBus) that utilizes Low Voltage Differential Signaling (LVDS) to improve data throughput.

3. Grounds for Unpatentability

Ground 1: Claims 7-8 and 18-20 are obvious over Chu330, Peleg, and Helms

• Prior Art Relied Upon: Chu330 (Patent 6,345,330), Peleg (Patent 6,557,065), and Helms (Patent 7,146,510).
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner argued that Chu330 disclosed the foundational modular computer system, comprising a notebook (ACM) and a docking station (PCON) connected by a high-speed serial XPBus to improve data throughput over standard PCI buses. However, Chu330’s CPU did not connect directly to its peripheral bridge (Southbridge). Peleg was cited to remedy this, as it taught a highly integrated architecture where the CPU and Northbridge are combined, and this integrated CPU connects directly to a Southbridge chip via a front-side bus. Petitioner contended that combining Peleg’s integrated architecture with Chu330’s modular system would render the claimed direct connection between the CPU and the peripheral bridge obvious. Finally, Helms was introduced for its teaching of an I/O Hub that integrates the functionality of a Southbridge and an interface controller, which manages a unidirectional, differential signal interface analogous to the claimed LVDS channel.
  • Motivation to Combine: A POSITA would combine Chu330 and Peleg to implement Peleg’s high-performance, integrated CPU architecture within Chu330’s desirable modular and portable form factor. A POSITA would have been further motivated to incorporate the teachings of Helms to integrate the Southbridge and interface controller functionalities into a single chip, a known technique for improving performance, increasing power efficiency, and reducing physical footprint.
  • Expectation of Success: Petitioner asserted a high expectation of success, as the references describe compatible computer architectures with common, well-understood components (e.g., CPU, Northbridge, Southbridge, PCI bus), making their integration predictable.

Ground 2: Claims 1-3 and 9-13 are obvious over Chu330, Peleg, Helms, and Chu777

• Prior Art Relied Upon: Chu330 (Patent 6,345,330), Peleg (Patent 6,557,065), Helms (Patent 7,146,510), and Chu777 (Patent 6,643,777).
• Core Argument for this Ground:
  • Prior Art Mapping: This ground built upon the combination of Chu330, Peleg, and Helms from Ground 1 to address additional limitations in claims 1-3 and 9-13 related to Ethernet connectivity and the use of flash memory. Petitioner argued that Chu777, which incorporates Chu330 by reference, explicitly teaches enhancing a modular computer system with a network card for LAN/Ethernet connectivity. Chu777 also expressly teaches that a standard mass storage device like a hard disk drive can be replaced with other types of storage, including flash memory.
  • Motivation to Combine: The motivation to add the teachings of Chu777 was to incorporate common, desirable features into the base computer system. A POSITA would have recognized the clear advantages of adding network capability and using faster, more durable solid-state storage (flash memory), which were well-known improvements for computer systems at the time.
  • Expectation of Success: Success was expected because adding an Ethernet card to a PCI bus in a docking station and substituting one type of known mass storage for another were routine modifications for a POSITA.

4. Key Claim Construction Positions

• "peripheral bridge": Petitioner argued this term should be construed as "a southbridge that interfaces with a peripheral bus or device." This proposed construction was based on an analysis of the ’797 patent’s specification, which Petitioner contended consistently uses "peripheral bridge" to refer to the "South Bridge" component (e.g., in Figure 21) while using distinct terms like "CPU Bridge" for the "North Bridge." This construction was central to mapping the Peleg and Helms references.

5. Key Technical Contentions (Beyond Claim Construction)

• Priority Date Challenge: Petitioner presented a significant argument that the challenged claims were not entitled to a priority date earlier than April 15, 2011. It was argued that key claim limitations—specifically those related to an integrated CPU/Southbridge and its direct connection to the LVDS bus—were first disclosed in the application that issued as the ’436 patent and constituted new matter not supported by any earlier parent applications. Petitioner contended that the Patent Owner's attempt to incorporate the ’886 provisional application by reference into an earlier parent was legally defective. This technical argument was critical for establishing that Peleg and Helms qualify as prior art.

6. Arguments Regarding Discretionary Denial

• Petitioner argued that discretionary denial under §325(d) or the Fintiv factors would be inappropriate. It was contended that the Examiner had not previously considered the core prior art combination (specifically Peleg and Helms) or the critical priority date argument during prosecution. Regarding the Fintiv factors, Petitioner argued for institution by highlighting that the Petitioner (Intel) is not a defendant in the parallel district court litigation. Furthermore, for the Real Parties-in-Interest who are defendants, the trial is scheduled far in the future, minimal investment has been made in the litigation, and they are willing to stipulate not to pursue the same invalidity grounds in court, thus mitigating concerns of duplicative efforts.

7. Relief Requested

• Petitioner requests institution of an inter partes review and cancellation of claims 1-3, 7-13, and 18-20 of the ’797 patent as unpatentable.