PTAB

IPR2021-01110

Intel Corp v. Acqis LLC

Key Events

Petition

petition

Title: Computer System with Attached Computer Module and Peripheral Console
Brief Description: The ’750 patent discloses a modular computer system comprising a removable Attached Computer Module (ACM) and a Peripheral Console (PCON). The ACM contains core components like a CPU and graphics subsystem, which communicate with peripherals housed in the PCON via a high-speed exchange interface system (XIS) that utilizes Low Voltage Differential Signal (LVDS) channels.

Prior Art Relied Upon: Chu330 (Patent 6,345,330) and Cupps (Application # 2003/0135771).
Core Argument for this Ground:
- Prior Art Mapping: Petitioner argued that Chu330 discloses a modular computer architecture (ACM and PCON) with a communication interface (HIC and PIC) that is substantively identical to that of the ’750 patent. However, Chu330’s components (CPU, graphics, interface controller) are discrete. Petitioner asserted that Cupps remedies this deficiency by teaching the integration of a CPU, graphics controller, and I/O controllers onto a single integrated circuit chip to achieve various efficiencies.
- Motivation to Combine: A Person of Ordinary Skill in the Art (POSITA) would combine Chu330's system with Cupps's integration teachings to achieve well-known and predictable benefits. These benefits, explicitly taught by Cupps, include improved power efficiency, reduced physical footprint, and increased performance. This was particularly compelling as Chu330 itself identifies low power consumption as a desirable design goal.
- Expectation of Success: A POSITA would have had a reasonable expectation of success in integrating the components of Chu330’s ACM onto a single chip. The components are substantially similar to those that Cupps teaches are commonly integrated, and the combination represents the application of a known technique to a similar system to yield predictable results.

Prior Art Relied Upon: Chu330 (Patent 6,345,330), Cupps (Application # 2003/0135771), and Helms (Patent 7,146,510).
Core Argument for this Ground:
- Prior Art Mapping: This ground builds upon Ground 1, adding Helms to address limitations in dependent claims 2, 4, and 45, which require an interface controller with Phase-Locked Loop (PLL) clock circuitry capable of generating different clock frequencies. Petitioner contended that Helms discloses an I/O hub with a PLL that can generate multiple frequencies to adjust data transfer rates over a communication link, incorporating the HyperTransport specification for this purpose.
- Motivation to Combine: A POSITA would be motivated to incorporate the variable-frequency PLL taught by Helms into the integrated system of Chu330 and Cupps. The primary motivations were to enhance power management (by slowing the clock during low utilization) and increase system flexibility, both of which Helms explicitly teaches as advantages of its adjustable-frequency I/O link.
- Expectation of Success: Helms demonstrates that implementing an interface controller to convey data based on different PLL-generated clock frequencies was a known technique for a substantially similar interface. This provided a POSITA with a clear roadmap and a reasonable expectation of successfully applying this feature to the Chu330 system.

Incorrect Priority Date: A central contention of the petition was that the ’750 patent is not entitled to a priority date earlier than April 15, 2011. Petitioner argued that the key claim limitations requiring an "integrated CPU-graphics/controller" in a single chip and a "CPU-LVDS" channel were not supported by the patent’s parent applications. According to the petition, this subject matter was first introduced in the application for the ancestral ’436 patent and constituted new matter. This assertion is critical as it establishes that Chu330, Cupps, and Helms all qualify as prior art to the challenged claims.

Petitioner argued that discretionary denial under 35 U.S.C. §325(d) was inappropriate because, although Chu330 was listed in an Information Disclosure Statement, the Examiner never cited it against any claims and, more importantly, failed to determine the proper priority date of the challenged claims. This failure meant that the Examiner never considered references like Cupps and Helms, which teach the allegedly new matter.
Petitioner also argued that discretionary denial under Fintiv was unwarranted. The core reasons were that Petitioner (Intel) is not a defendant in the parallel district court litigations, those litigations were in very early stages, and the Real Parties-in-Interest (Lenovo entities who are defendants) were willing to stipulate not to raise the same invalidity grounds in court, thereby mitigating any concerns of duplicative efforts or inconsistent rulings.

Petitioner requests the institution of an inter partes review and the cancellation of claims 1-2, 4, 21, 24, 31, 34, 44-45, and 48-50 of the ’750 patent as unpatentable.