Intel Corp v. Acqis LLC

1. Case Identification

• Case #: IPR2021-01112
• Patent #: 9,703,750
• Filed: June 14, 2021
• Petitioner(s): Intel Corporation
• Patent Owner(s): Acqis LLC
• Challenged Claims: 14-17, 29-30, 42-43

2. Patent Overview

• Title: Modular Computer System Architecture
• Brief Description: The ’750 patent discloses a modular computer system comprising a primary processing unit, referred to as an Attached Computer Module (ACM), and a peripheral docking station, referred to as a Peripheral Console (PCON). The ACM and PCON communicate via a high-speed serial interface that replaces traditional parallel bus architectures to reduce size, cost, and power consumption.

3. Grounds for Unpatentability

Ground 1: Obviousness over Chu330, Peleg, Helms, and Chu8415 - Claims 29-30 are obvious over Chu330 in view of Peleg, Helms, and Chu8415.

• Prior Art Relied Upon: Chu330 (Patent 6,345,330), Peleg (Patent 6,557,065), Helms (Patent 7,146,510), and Chu8415 (Patent 6,718,415).
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner asserted that the primary reference, Chu330, teaches a modular computer system (notebook PC and docking station) connected by a serialized, low-pin-count interface (the "XPBus") using Host and Peripheral Interface Controllers (HIC/PIC) to replace a conventional parallel PCI bus. Peleg teaches a highly integrated architecture where the CPU, graphics processor, and Northbridge are combined on a single chip, with a Southbridge chip directly coupled to this integrated CPU via a Front-Side Bus (FSB). Helms discloses an I/O hub that integrates the functionality of a Southbridge and an interface controller (like Chu330’s HIC) onto a single chip. Finally, Chu8415 teaches the inclusion of a standard network controller (e.g., an Ethernet controller) coupled to the system via the PCI bus.
  • Motivation to Combine: A POSITA would combine Chu330's modular system with Peleg's highly integrated CPU architecture to create a system that is both portable and powerful. A POSITA would then be motivated to incorporate Helms’ integrated Southbridge/interface controller to further reduce component count, power consumption, and physical footprint, all well-known benefits of system-on-chip integration. The addition of a network controller as taught by Chu8415 was argued to be a simple and predictable modification to provide necessary network connectivity.
  • Expectation of Success: Petitioner argued a POSITA would have a high expectation of success, as the combination involves integrating known components using standard interfaces to achieve predictable improvements in performance, size, and power efficiency.

Ground 2: Obviousness over Chu330, Peleg, and Helms - Claims 14-17 and 42-43 are obvious over Chu330 in view of Peleg and Helms.

• Prior Art Relied Upon: Chu330 (Patent 6,345,330), Peleg (Patent 6,557,065), and Helms (Patent 7,146,510).
• Core Argument for this Ground:
  • Prior Art Mapping: This ground relies on the same core combination as Ground 1 but targets a different set of claims. Petitioner argued this combination teaches all limitations of claims 14-17 and 42-43. Peleg provides the integrated CPU and graphics subsystem on a single chip. The combination with Chu330 and Helms provides a peripheral bridge (the integrated Southbridge from Helms) directly coupled to the integrated CPU (as taught by Peleg's FSB architecture), without an intervening PCI bus. Chu330 provides the claimed Low Voltage Differential Signal (LVDS) channel and the use of a connector to couple the computer module to the peripheral console.
  • Motivation to Combine: The motivations are identical to those in Ground 1: to achieve a compact, power-efficient, and high-performance modular computer system by leveraging known integration techniques. A POSITA would combine Peleg's integrated CPU/graphics core with Helms' integrated I/O hub and apply it to Chu330's modular framework to realize these benefits.
  • Expectation of Success: As with Ground 1, success would be expected because the combination leverages established design principles and components to achieve predictable results.

4. Key Claim Construction Positions

• "peripheral bridge": Petitioner argued this term should be construed as "a southbridge that interfaces with a peripheral bus or device." This proposed construction was based on the ’750 patent’s specification, which exclusively refers to a "South Bridge" when identifying a "peripheral bridge" and consistently distinguishes it from the "CPU Bridge," which is identified as a "North Bridge." This construction is critical to mapping the Southbridge-focused teachings of Peleg and Helms to the claims.

5. Key Technical Contentions (Beyond Claim Construction)

• Priority Date Challenge: Petitioner contended that the challenged claims are not entitled to a priority date earlier than April 15, 2011, the filing date of the parent ’436 patent. It was argued that the key claim limitation of a "peripheral bridge... directly coupled to the [CPU] without any intervening [PCI] bus" constitutes new matter first introduced in the ’436 patent’s application. Petitioner asserted that earlier applications in the priority chain lacked written description support for this specific architecture and that attempts to incorporate the disclosure by reference from an earlier provisional application were procedurally defective. This argument is central to establishing that Peleg and Helms qualify as prior art.

6. Arguments Regarding Discretionary Denial

• §325(d) (Same or Substantially Same Art): Petitioner argued against discretionary denial because, while Chu330 and Chu8415 were listed in an Information Disclosure Statement, they were never substantively examined or applied against any claims during prosecution. Furthermore, the Examiner did not properly determine the priority date, meaning references like Peleg and Helms were never considered as prior art in the first place.
• §314(a) (Fintiv Factors): Petitioner asserted that the Fintiv factors weighed against denial. Key arguments included: (1) Petitioner is not a party to the parallel district court litigation and cannot move for a stay; (2) the court’s trial date is estimated to be 18 months post-petition, well after the statutory deadline for a Final Written Decision; (3) the parallel litigation is in its early stages, with discovery stayed pending claim construction; and (4) the petition presents compelling, meritorious grounds for unpatentability.

7. Relief Requested

• Petitioner requests institution of an inter partes review (IPR) and cancellation of claims 14-17, 29-30, and 42-43 of the ’750 patent as unpatentable.