Kioxia Corp v. Sonrai Memory Ltd

1. Case Identification

• Case #: IPR2021-01354
• Patent #: 7,436,232
• Filed: August 5, 2021
• Petitioner(s): Kioxia Corporation, Kioxia America, Inc., Western Digital Technologies, Inc., and Dell Technologies, Inc.
• Patent Owner(s): Sonrai Memory Limited
• Challenged Claims: 14

2. Patent Overview

• Title: Regenerative Clock Repeater
• Brief Description: The ’232 patent discloses a method and apparatus for regenerating a clock signal that has degraded during transmission over a wire in an integrated circuit. The invention uses an edge detector circuit with high- and low-threshold level detectors to sense rising and falling edges, which in turn generate pull-up and pull-down control signals to restore the clock signal’s square waveform.

3. Grounds for Unpatentability

Ground 1: Anticipation of Claim 14 under 35 U.S.C. §102

• Prior Art Relied Upon: Masleid (Patent 7,053,680)
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner argued that Masleid’s “complement reset buffer” discloses every element of claim 14. Masleid teaches a circuit for regenerating a signal on a clock distribution line. It discloses detecting a rising edge using a first circuit with an N-skewed NAND gate and a falling edge using a second circuit with a P-skewed NOR gate. In response to detecting the rising edge, a pulse from the first circuit drives a PFET transistor in an output stage, which acts as a pull-up control signal to recover the high logical level. Similarly, in response to the falling edge, a pulse from the second circuit drives an NFET transistor, which acts as a pull-down control signal to recover the low logical level. Petitioner asserted that the preamble phrase "in a synchronous semiconductor memory" merely states an intended use and is not a limiting feature of the claimed method.

Ground 2: Obviousness of Claim 14 under 35 U.S.C. §103

• Prior Art Relied Upon: Masleid (Patent 7,053,680) alone or in combination with Kono (Patent 6,707,758)
• Core Argument for this Ground:
  • Prior Art Mapping: To the extent the Board considers the preamble phrase "in a synchronous semiconductor memory" to be a limitation, Petitioner argued claim 14 is obvious. The mapping of Masleid to the method steps of the claim body is identical to that presented in Ground 1. Kono was introduced to explicitly disclose the use of clock repeaters within a synchronous memory environment, specifically a Double Data Rate Synchronous DRAM (DDR SDRAM). Kono describes using repeaters to ensure proper data output timing across the memory device.
  • Motivation to Combine (for §103 grounds): Petitioner contended that a person of ordinary skill in the art (POSITA) would have been motivated to implement Masleid's improved clock buffer in the synchronous memory system of Kono. Masleid recognized the deficiencies of conventional buffers (like those in Kono) and taught a more energy-efficient buffer that decreases transition times and handles long-wire distances. A POSITA would have recognized these advantages and been motivated to substitute Masleid’s superior buffer for Kono's conventional repeaters to improve the speed, efficiency, and manufacturing yield of synchronous memory devices.
  • Expectation of Success (for §103 grounds): A POSITA would have had a reasonable expectation of success, as the combination involved applying an improved, known type of circuit (Masleid's buffer) for its intended purpose within a well-understood application environment (Kono's synchronous memory).

4. Arguments Regarding Discretionary Denial

• Petitioner argued that discretionary denial under §314(a) (based on Fintiv factors) and §325(d) (based on Becton Dickinson factors) would be inappropriate.
• Fintiv Analysis: Petitioner asserted that factors weigh against denial because: (1) a stay in the parallel district court litigation is possible; (2) the IPR Final Written Decision would issue before the likely trial date in the parallel litigation; (3) the parallel proceeding is in a very early stage, with no claim construction or significant discovery having occurred; and (4) Petitioner stipulated it would not pursue the same invalidity grounds in the district court if the IPR is instituted.
• Becton Dickinson Analysis: Petitioner argued against denial under §325(d) because the primary prior art references, Masleid and Kono, were never cited or considered during the original prosecution of the ’232 patent. Furthermore, Petitioner contended that the asserted art is not cumulative to the art the examiner did consider, as Masleid expressly teaches the circuit limitations that the examiner found lacking in the art of record during prosecution.

5. Relief Requested

• Petitioner requests institution of an inter partes review and cancellation of claim 14 of Patent 7,436,232 as unpatentable.