PTAB

IPR2021-01504

Seoul Semiconductor Co Ltd v. LED Wafer Solutions LLC

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Petition
petition

1. Case Identification

2. Patent Overview

  • Title: Light Emitting Diode Package with Enhanced Heat Conduction
  • Brief Description: The ’612 patent discloses a light emitting diode (LED) device and package structure intended to provide enhanced heat conduction. The claimed device includes a semiconductor LED on a substrate, a thermally conductive layer, a carrier wafer, an optically reflective surface, and a "relief" feature that exposes a portion of the LED surface.

3. Grounds for Unpatentability

Ground 1: Obviousness over Hashimoto in view of Schubert or Nakamura - Claims 1, 2, 4, 6, 7, and 9 are obvious over Hashimoto in view of Schubert or Nakamura.

  • Prior Art Relied Upon: Hashimoto (Application # 2004/0012958), Schubert (a 2006 textbook titled Light-Emitting Diodes), and Nakamura (Patent 5,777,350).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Hashimoto, which describes a flip-chip LED package, discloses every limitation of independent claim 1 except for the requirement of a semiconductor LED with "intrinsic regions." Hashimoto teaches a substrate, a thermally conductive layer (e.g., a silver plate), a carrier wafer (referred to as a "mounting board"), an optically reflective surface (the surface of the silver plate), and a relief (a hole or opening) exposing the LED surface. For dependent claims, Petitioner asserted Hashimoto’s silver plate or paste met the "metal" (claim 2) and "optical reflection" (claim 6) limitations, and its silver paste adhesive met the "high thermal conductivity" (claim 4) limitation.
    • Motivation to Combine (for §103 grounds): Hashimoto's disclosure is silent on whether its light-emitting layer is doped. Schubert and Nakamura were presented as well-known references teaching the significant advantages of using an undoped, or intrinsic, active layer in LEDs. These benefits included increased radiative efficiency, improved crystallinity, and lower forward voltage. A POSITA would combine the teachings of Schubert or Nakamura with Hashimoto's device to incorporate this known, beneficial feature and achieve predictable improvements in performance.
    • Expectation of Success (for §103 grounds): A POSITA would have had a high expectation of success, as implementing an intrinsic active layer was a conventional and well-understood technique in LED fabrication at the time.

Ground 2: Obviousness over Hashimoto, Schubert/Nakamura, and Bhat or Donofrio - Claim 3 is obvious over Hashimoto in view of Schubert or Nakamura, and further in view of Bhat or Donofrio.

  • Prior Art Relied Upon: The combination from Ground 1, plus Bhat (Application # 2003/0025212) or Donofrio (Application # 2010/0140636).
  • Core Argument for this Ground:
    • Prior Art Mapping: This ground targets claim 3, which requires the optically reflective surface to comprise a "dielectric stack." The primary combination in Ground 1 discloses a metallic reflective surface. Petitioner argued that Hashimoto's flip-chip design creates gaps between metal components (like the thermally conductive layer and conductive paste) to avoid short circuits, but these non-reflective gaps allow light to escape, reducing efficiency.
    • Motivation to Combine (for §103 grounds): Bhat and Donofrio explicitly address this known problem in flip-chip LEDs. They both teach applying a highly reflective dielectric stack to the surfaces and sides of the LED mesa, specifically in the gaps between electrodes. A POSITA would combine the teachings of Bhat or Donofrio with Hashimoto's device to solve the problem of light loss through these gaps, thereby increasing the device's light extraction efficiency, without creating a short circuit.
    • Expectation of Success (for §103 grounds): The creation and application of dielectric stacks were well within the capabilities of a POSITA, and their use for enhancing reflectivity was a known technique with predictable results.

Ground 3: Obviousness over Citizen, Suehiro, and Schubert or Nakamura - Claims 1-3, 7, and 9 are obvious over Citizen in view of Suehiro, and further in view of Schubert or Nakamura.

  • Prior Art Relied Upon: Citizen (Japan Application # 2005-175387), Suehiro (Application # 2009-0050926), and Schubert or Nakamura.
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Citizen discloses a general optical semiconductor package suitable for a flip-chip LED, teaching key structural elements like a carrier wafer, copper electrodes (a thermally conductive layer), a relief (a hole), and a light-transmissive sealing body. However, Citizen provides only a high-level depiction of the LED itself. Suehiro was offered to supply the missing details, as it discloses a complete internal structure of a flip-chip LED, including the substrate, doped layers, and light-emitting layer.
    • Motivation to Combine (for §103 grounds): A POSITA seeking to build the package described in Citizen would have naturally looked to known, detailed flip-chip LED designs like Suehiro to provide the necessary semiconductor component. This combination represents filling in missing details of a general design with a specific, compatible implementation from the art. The addition of Schubert or Nakamura was for the same reason as in Ground 1: to render Suehiro's light-emitting layer intrinsic for its known performance benefits.
    • Expectation of Success (for §103 grounds): Combining a known LED structure with a compatible package was a routine design choice for a POSITA with a clear expectation of creating a functional device.
  • Additional Grounds: Petitioner asserted a further ground that claims 4 and 6 are obvious over the Citizen/Suehiro combination when further combined with Rothchild (Application # 2006/0104855). Rothchild was cited to teach a lead-free solder with both high thermal conductivity and high reflectivity, which a POSITA would have been motivated to use as the adhesive material in Citizen's device to improve thermal performance and minimize light loss.

4. Key Claim Construction Positions

  • "intrinsic": Petitioner argued this term should be construed to mean "undoped or not-doped." This construction was based on the patent's explicit contrast between "intrinsic regions" and "doped regions," as well as dictionary definitions defining intrinsic semiconductors as lacking impurities or dopants. This construction is critical to mapping the teachings of Schubert and Nakamura, which describe the benefits of "undoped" active layers.
  • "relief": Petitioner argued that "relief" is not a term of art in the LED field and should be construed broadly as a "hole or opening." This position was supported by examples in the specification describing the relief as a "via (hole)" and a "thermally conducting hole," as well as general-purpose dictionary definitions. A broad construction was necessary for the structures in Hashimoto and Citizen to meet this limitation.

5. Relief Requested

  • Petitioner requests institution of an inter partes review and cancellation of claims 1-4, 6, 7, and 9 of Patent 9,502,612 as unpatentable.