PTAB

IPR2021-01554

Samsung Electronics Co Ltd v. LED Wafer Solutions LLC

Key Events
Petition
petition

1. Case Identification

2. Patent Overview

  • Title: Light Emitting Diode Device
  • Brief Description: The ’612 patent discloses methods and apparatus for light emitting diode (LED) device packaging designed to efficiently remove excess heat during operation. The technology involves a semiconductor LED mounted on a substrate, bonded to a carrier wafer, and incorporates features like thermally conductive layers and reflective surfaces to manage heat and light output.

3. Grounds for Unpatentability

Ground 1: Claims 1, 2, 8, and 9 are obvious over Tanaka

  • Prior Art Relied Upon: Tanaka (Application # 2003/0232455).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Tanaka, which discloses a light-emitting element, teaches all limitations of independent claim 1. Specifically, Tanaka showed a semiconductor LED (chip 70) with doped (N-type layer 72, P-type layer 74) and intrinsic (activation layer 73) regions disposed on a substrate (sapphire substrate 71). A thermally conductive layer (wiring pattern 80) was disposed on the LED, and a carrier wafer (monocrystal silicon substrate 20) was disposed on the conductive layer. Tanaka further disclosed optically reflective surfaces (metal electrode layers 51, 52) between the carrier wafer and the LED. Finally, Petitioner asserted that Tanaka’s carrier wafer and conductive layer define a relief (hole 31) that exposes a portion of the second LED surface. Dependent claims 2, 8, and 9 were allegedly obvious as they recited features also disclosed in Tanaka, such as the reflective surface comprising metal (claim 2) and a spacer (insulating layer 61, claim 8).
    • Motivation to Combine (for §103 grounds): This ground relied on a single reference. Petitioner contended it would have been obvious for a person of ordinary skill in the art (POSITA) to configure Tanaka’s wiring pattern 80 from metal, a common and predictable choice for electrical wiring, rendering it thermally conductive.
    • Expectation of Success (for §103 grounds): A POSITA would have a reasonable expectation of success in using metal for the wiring pattern as metals were well-known materials for conductive traces in semiconductor devices.

Ground 2: Claim 3 is obvious over Tanaka in view of Weeks

  • Prior Art Relied Upon: Tanaka (Application # 2003/0232455) and Weeks (Patent 7,233,028).
  • Core Argument for this Ground:
    • Prior Art Mapping: This ground addressed claim 3, which requires the optically reflective surface of claim 1 to comprise a dielectric stack. Petitioner asserted Tanaka disclosed a metal reflective surface but was silent on using a dielectric stack. Weeks, however, explicitly taught using a Distributed Bragg Reflector (DBR) comprising multiple dielectric layers as a reflective surface in an LED device to improve light efficiency.
    • Motivation to Combine (for §103 grounds): A POSITA would combine Weeks’s DBR with Tanaka's LED structure to improve light reflection and device performance. Both references addressed the common problem of improving light efficiency in LEDs. Petitioner argued a POSITA would be motivated to add Weeks's DBR to the inner sides of Tanaka's electrodes to better direct light and prevent leakage.
    • Expectation of Success (for §103 grounds): The combination involved straightforward, well-known technologies, and a POSITA would have had predictable results in implementing a DBR in Tanaka's device to enhance reflectivity.

Ground 3: Claims 4-7 are obvious over Tanaka in view of Chitnis

  • Prior Art Relied Upon: Tanaka (Application # 2003/0232455) and Chitnis (Application # 2007/0284602).

  • Core Argument for this Ground:

    • Prior Art Mapping: This ground addressed claims 4-7, which depend from claim 1 and specify properties of an adhesive material used to affix the LED to the carrier wafer. Petitioner argued that Tanaka disclosed using a conductive adhesive but did not specify its properties. Chitnis taught wafer-level bonding techniques for LEDs and disclosed using adhesive materials with the specific properties recited in the claims. Specifically, Chitnis disclosed using eutectic bonding materials like Au-Si or Au-Sn, which have high thermal conductivity (claim 4), optical reflection (claim 6), and are electrically conductive. Chitnis also disclosed using insulating adhesives like benzocyclobutene (BCB), which has properties of optical diffusion (claim 5) and optical transmissivity (claim 7).
    • Motivation to Combine (for §103 grounds): A POSITA fabricating the device in Tanaka would look to a reference like Chitnis for detailed bonding techniques. A POSITA would combine Chitnis’s high thermal conductivity adhesive with Tanaka's device to improve heat dissipation from the LED, a known concern. This would be a predictable solution to a known problem.
    • Expectation of Success (for §103 grounds): Implementing the well-known bonding adhesives from Chitnis into the structure of Tanaka would be a straightforward combination of known elements to yield predictable results, improving thermal performance and device reliability.
  • Additional Grounds: Petitioner asserted additional obviousness challenges based on combinations of Tanaka with Applicant Admitted Prior Art (AAPA), Weeks, and Chitnis, as well as combinations of Tanaka with Camras (’839 patent), Weeks, and Chitnis. These grounds relied on similar theories, primarily using AAPA or Camras to further support the presence of an intrinsic layer in Tanaka’s LED structure.

4. Arguments Regarding Discretionary Denial

  • Petitioner argued that discretionary denial would be inappropriate under both the General Plastic and Fintiv frameworks.
  • General Plastic: Petitioner contended this was not an improper "follow-on" petition because it was Petitioner's first challenge to the ’612 patent, and it challenged a different and broader set of claims than a separate IPR filed by another party (Seoul Semiconductor).
  • Fintiv: Petitioner argued the Fintiv factors favored institution because the parallel district court litigation was in its early stages with no set trial date and minimal investment by the court and parties. Petitioner further stipulated that if the IPR were instituted, it would not pursue the same invalidity grounds in the district court litigation, thereby avoiding duplicative efforts.

5. Relief Requested

  • Petitioner requests institution of an inter partes review (IPR) and cancellation of claims 1-9 of the ’612 patent as unpatentable under 35 U.S.C. §103.