PTAB

IPR2022-00121

Pure Storage Inc v. Digital Cache LLC

Key Events

Petition

petition

Title: Method of Overwriting Data in Nonvolatile Memory and a Control Apparatus Used for the Method
Brief Description: The ’015 patent addresses potential data loss during overwrite operations in non-volatile memory (NVM) such as flash memory. It discloses a method where pre-overwrite data is first copied from a target sector to a dedicated backup region within the same NVM to ensure data can be recovered if a power failure interrupts the multi-step overwrite process.

Prior Art Relied Upon: Morihiro (English Translation of Japanese Publication No. JP-H7168769).
Core Argument for this Ground:
- Prior Art Mapping: Petitioner argued that Morihiro teaches every element of the challenged claims. Morihiro explicitly addresses preventing data loss from an "electric service interruption" during updates to nonvolatile memory. It discloses a flash memory system with multiple "data areas" (sectors) and a "working area" (backup region). The taught method involves copying pre-update data from a target data area to the working area before erasing and writing new data to the target area. Morihiro further discloses storing a checksum with the data in both the data and working areas and, upon power restoration, executing an initialization process to check for errors and recover data from the working area if the target area is corrupted.
- Motivation to Combine (for §103 grounds): As a single-reference ground, the argument is that a person of ordinary skill in the art (POSITA) would have recognized Morihiro's teachings as a complete solution to the known problem of data loss in flash memory, rendering the ’015 patent's claims obvious.
- Expectation of Success (for §103 grounds): A POSITA would have had a high expectation of success, as Morihiro provides a complete, functional system for preventing data loss that mirrors the method claimed in the ’015 patent.

Prior Art Relied Upon: Morihiro (Japanese Publication No. JP-H7168769) and Forsman (Patent 6,665,813).
Core Argument for this Ground:
- Prior Art Mapping: This ground builds on Morihiro by adding Forsman to teach the specific limitation of using a Cyclic Redundancy Check (CRC) value as the error detection code. While Morihiro teaches using a generic checksum ("CHS"), Petitioner asserted that Forsman explicitly discloses that a CRC is a well-known and effective type of checksum used to detect data corruption in flash memory systems.
- Motivation to Combine (for §103 grounds): A POSITA would combine these references to improve the known data integrity system of Morihiro. Recognizing that Morihiro used a generic checksum, a POSITA would have looked to the art for known, effective checksum techniques and found Forsman's disclosure of CRC. It would have been an obvious design choice to substitute Morihiro's generic checksum with the specific, well-understood CRC technique from Forsman to enhance error detection capabilities.
- Expectation of Success (for §103 grounds): Success would be expected because implementing a known error-checking algorithm (CRC) into a system already designed for error checking (Morihiro) is a predictable application of known technologies that would yield a more robust system.

Prior Art Relied Upon: Morihiro (Japanese Publication No. JP-H7168769) and Mitomi (English Translation of Japanese Publication No. JP-H10124403).
Core Argument for this Ground:
- Prior Art Mapping: This ground addresses the specific sequence of validity checks recited in claim 11. Morihiro teaches checking both the target data sector and the backup region for validity after a power failure. Mitomi teaches a specific, logical order for this process: first, check the target memory block for validity, and if it is determined to be invalid, then proceed to check the backup memory block for validity.
- Motivation to Combine (for §103 grounds): A POSITA would combine these references to implement a more structured and efficient recovery process in Morihiro's system. It would have been a mere design choice to adopt the known, logical validation sequence taught by Mitomi—checking the primary data location before the backup location—into Morihiro's recovery procedure. This represents a simple substitution of one known validation order for another to achieve the predictable result of an orderly recovery process.
- Expectation of Success (for §103 grounds): There would be a high expectation of success in applying a specific, logical order of operations (from Mitomi) to a system that already performs those same operations (from Morihiro), as it is a routine optimization.

Petitioner argued that discretionary denial under Fintiv would be inappropriate. It contended that the parallel district court litigation was in its infancy, as the petition was filed less than four months after service of the complaint, and no scheduling order had been issued or trial date set. Petitioner also stipulated that, if the IPR is instituted, it would withdraw any identical invalidity grounds from the district court proceeding, thereby eliminating any potential overlap in issues and conserving judicial resources.

Petitioner requests the institution of an inter partes review and the cancellation of claims 1-11 of Patent 6,851,015 as unpatentable under 35 U.S.C. §103.