PTAB

IPR2023-00035

Apple Inc v. Zentian Ltd

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1. Case Identification

2. Patent Overview

  • Title: Speech Recognition System Using Multiple Programmable Devices
  • Brief Description: The ’377 patent discloses a speech recognition system that distributes the core processing steps—feature vector extraction, distance calculation, and word identification—across three distinct programmable devices to perform the overall recognition task.

3. Grounds for Unpatentability

Ground 1: Obviousness over Jiang and Smyth - Claim 1

  • Prior Art Relied Upon: Jiang (Patent 6,374,219) and Smyth (Patent 5,819,222).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Jiang teaches a speech recognition system performing nearly all the claimed steps, including feature extraction, distance calculation (as a "likelihood score"), and word identification using a lexical tree. However, Petitioner contended Jiang implements these functions on only two distinct processors: a feature extraction processor and a "tree search engine" that performs both distance calculation and word search. To meet the ’377 patent’s three-device limitation, Petitioner relied on Smyth, which explicitly discloses a speech recognition architecture using three separate, distinct Digital Signal Processors (DSPs) to perform the three analogous functions: (1) feature extraction, (2) classification/distance calculation, and (3) sequencing/word identification.
    • Motivation to Combine: Petitioner asserted a person of ordinary skill in the art (POSITA) would combine Jiang and Smyth to improve system performance. Jiang itself contemplated using multiprocessor configurations to handle the computationally intensive tasks of speech recognition. Smyth provided a known and logical blueprint for distributing these tasks across three dedicated processors. A POSITA would have been motivated to modify Jiang’s two-processor search engine by separating its functions into two distinct processors as taught by Smyth to achieve faster, more efficient, and more accurate speech recognition, a primary goal in the art.
    • Expectation of Success: Petitioner argued there was a high expectation of success because the proposed modification involved applying Smyth's well-known hardware architecture to Jiang's system. This was a predictable combination of prior art elements, using Smyth's dedicated processors to perform functions already present in Jiang, which would predictably yield improved processing efficiency.

Ground 2: Obviousness over Jiang, Smyth, and Nguyen - Claims 2-3

  • Prior Art Relied Upon: Jiang (Patent 6,374,219), Smyth (Patent 5,819,222), and Nguyen (Patent 6,879,954).

  • Core Argument for this Ground:

    • Prior Art Mapping: This ground builds upon the three-device system established by Jiang and Smyth to address claim 2, which requires the time period for word identification to overlap with the time period for distance calculation. Petitioner argued that Nguyen teaches this contemporaneous processing. Nguyen discloses a system where a similarity measure (distance calculation) is computed for a "subsequent group" of feature vectors at the same time a search process (word identification) is performed on a "first group" of vectors. Claim 3 adds that the three devices are "physically distinct processing circuits," which Petitioner argued was taught by Smyth's disclosure of three separate DSPs.
    • Motivation to Combine: Petitioner contended that a POSITA, having already combined Jiang and Smyth to create a multi-processor system, would be motivated to incorporate Nguyen's contemporaneous processing method to further enhance performance. Implementing Nguyen’s batch-processing approach would allow the distance calculation and word identification processors to work in parallel, reducing latency and increasing system throughput, a recognized benefit for computationally intensive applications.
    • Expectation of Success: Success would have been reasonably expected because parallel processing was a well-known technique for improving performance in multi-DSP systems like the one established by Jiang and Smyth. Implementing Nguyen's method would have been a straightforward modification for a POSITA seeking to optimize the system's efficiency.

  • Additional Grounds: Petitioner asserted claims 4-6 are obvious over the Jiang, Smyth, and Nguyen combination in further view of Boike (Patent 6,959,376) and/or Baumgartner (Application # 2002/0049582). Boike was cited for teaching the implementation of multiple distinct DSPs on a single integrated circuit (claim 4). Baumgartner was cited for teaching a multi-processor architecture where feature vector calculation and word identification are performed on a main processor, while the computationally-intensive distance calculation is offloaded to a separate, physically distinct accelerator circuit (claims 5-6).

4. Arguments Regarding Discretionary Denial

  • Petitioner argued that the Board should decline to exercise discretionary denial under Fintiv. The petition asserted that the co-pending district court litigation was at a nascent stage, with a trial date scheduled for approximately the same time as the IPR's Final Written Decision. Petitioner contended the court would not invest significant resources in an invalidity analysis pre-institution, and the petition presented a strong showing of unpatentability, weighing against denial.

5. Relief Requested

  • Petitioner requests institution of an inter partes review and cancellation of claims 1-6 of Patent 10,062,377 as unpatentable.