PTAB

IPR2023-01244

Semiconductor Components Industries LLC v. Greenthread LLC

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Key Events
Petition
petition

1. Case Identification

2. Patent Overview

  • Title: CMOS Device with Graded Dopant Concentrations
  • Brief Description: The ’222 patent relates to a Complementary Metal-Oxide Semiconductor (CMOS) device with graded dopant concentrations. The challenged claim recites a device comprising a single drift layer and at least one well region disposed within that drift layer, where both regions have graded dopant concentrations that create static, unidirectional electric fields to aid the movement of charge carriers away from the device surface.

3. Grounds for Unpatentability

Ground I: Obviousness over Payne - Claim 44 is obvious over Payne.

  • Prior Art Relied Upon: Payne (Patent 4,684,971).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Payne, which teaches a CMOS device with a nested well structure for high packing density, discloses all limitations of claim 44. Petitioner mapped Payne’s device components to the claim elements, identifying Payne’s silicon substrate as the claimed “substrate” and the top layer containing source/drain regions as the “surface layer.” Payne’s deep “tub regions” were mapped to the claimed “single drift layer,” and its shallow “surface regions” disposed therein were mapped to the claimed “well region.” Petitioner asserted that Payne’s disclosed “high-low implant profile,” which creates a dopant concentration that decreases with depth, constitutes the claimed “graded concentration of dopants” in both the drift layer and the well region. Based on established physical principles, this downward-sloping dopant concentration inherently creates the claimed first and second static unidirectional electric drift fields to aid carrier movement toward the substrate, an area with no active regions.

Ground II: Obviousness over Sakai and Kawagoe - Claim 44 is obvious over Sakai in view of Kawagoe.

  • Prior Art Relied Upon: Sakai (Patent 4,907,058) and Kawagoe (Patent 6,043,114).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner contended that Sakai teaches a CMOS device with a “twin double well” structure—shallow wells disposed within deep wells—analogous to the structure in Payne. Sakai's deep wells were mapped to the "single drift layer" and its shallow wells to the "well region." While Sakai taught a high-to-low dopant concentration between these wells, Petitioner asserted Kawagoe supplied the explicit teaching of engineering a gradually lowered dopant profile in the depthwise direction. Kawagoe taught this graded profile to reduce soft errors in CMOS devices by sweeping unwanted charge carriers into the substrate.
    • Motivation to Combine: A POSITA would combine the references to improve the reliability of Sakai’s high-density CMOS device. Petitioner noted that both Sakai and Kawagoe are Hitachi patents directed at improving CMOS technology. Sakai’s focus is on increasing packing density for memory devices (like SRAMs) using a nested well structure. Kawagoe addresses a known, critical problem in high-density memory devices: susceptibility to alpha-particle-induced soft errors. A POSITA would have been motivated to apply Kawagoe’s known and proven solution for soft errors—implementing graded dopant profiles to sweep away unwanted carriers—to Sakai’s high-density structure to create an improved, more robust memory device that is both compact and reliable.
    • Expectation of Success: Petitioner argued a POSITA would have had a reasonable expectation of success because creating graded dopant profiles using well-known ion implantation and thermal diffusion techniques was routine and predictable. The combination involved applying a known solution to a known problem to achieve a predictable result.

4. Key Claim Construction Positions

  • Petitioner stated that no specific claim constructions were necessary to resolve the petition. It argued that the challenged claim is unpatentable under the plain and ordinary meaning of its terms, as well as under the constructions previously proposed by the Patent Owner and a third party in related proceedings.

5. Key Technical Contentions (Beyond Claim Construction)

  • A central technical argument advanced by Petitioner was that a downward-sloping, graded dopant concentration inherently and necessarily creates a "static unidirectional electric drift field." Petitioner asserted that this principle was well-understood in the art and supported by admissions from the Patent Owner’s predecessor-in-interest during prosecution of a parent patent, which relied on the same physical principle to explain how prior art devices functioned to move minority carriers away from the surface.

6. Arguments Regarding Discretionary Denial

  • §314(a) (Fintiv): Petitioner argued against discretionary denial under Fintiv, asserting that the petition presents compelling evidence of unpatentability, particularly the single-reference obviousness ground based on Payne. It further noted that the trial date in the parallel district court litigation was not yet set and would likely occur well after the statutory deadline for the Board's Final Written Decision (FWD). Petitioner also stated its intent to seek a stay of the litigation if the inter partes review (IPR) is instituted.
  • §325(d): Petitioner contended that denial under §325(d) would be improper because the Examiner made a material error during prosecution. Specifically, the Examiner's allowance was based on a single reference (Hong) that is not prior art, while overlooking the pertinent teachings of Payne and Sakai (which were cited but not applied against the claims). Furthermore, the secondary reference Kawagoe was never presented to or considered by the Examiner, meaning the core argument of Ground II is new and not cumulative to the prosecution record.

7. Relief Requested

  • Petitioner requested institution of an IPR and cancellation of claim 44 of Patent 11,121,222 as unpatentable.