PTAB

IPR2023-01383

Innoscience Zhuhai Technology Co Ltd v. Efficient Power Conversion Corp

Key Events
Petition
petition

1. Case Identification

2. Patent Overview

  • Title: Method of Forming an Enhancement Mode GaN Transistor
  • Brief Description: The ’508 patent describes a method for fabricating enhancement-mode Gallium Nitride (GaN) transistors. The purported invention is a process that uses a single photo mask to pattern and etch both a gate metal layer and an underlying p-type GaN layer, creating a self-aligned structure intended to reduce manufacturing costs and gate charge.

3. Grounds for Unpatentability

Ground 1: Claims 1-3 are obvious over Yoshida, Beach, and Sheppard.

  • Prior Art Relied Upon: Yoshida (Japanese Application Publication No. JPH11261053A), Beach (WO 2005/057624), and Sheppard (Patent 7,238,560).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Yoshida taught the fundamental method of forming a GaN High Electron Mobility Transistor (HEMT), including growing the substrate, EPI, barrier, and p-GaN layers as required by claim 1. However, Petitioner contended Yoshida did not explicitly disclose using multiple transition layers, a single-mask process for the gate, or a specific masking process for forming ohmic contacts. Sheppard was introduced to supply the teaching of using multiple transition layers for improved strain balancing. Beach was introduced to teach a single-mask, self-aligning process for simultaneously etching the gate metal and underlying doped GaN layers, as well as a masking process for forming the source and drain ohmic contacts.
    • Motivation to Combine: A POSITA would combine Sheppard with Yoshida to improve the crystalline quality and reduce cracks in the GaN layers, a known problem that Sheppard's multiple transition layers were known to address. A POSITA would combine Beach with Yoshida to replace Yoshida’s undefined fabrication process with Beach’s simpler, cost-effective, and well-known single-mask technique that achieves desirable self-alignment and simplifies manufacturing.
    • Expectation of Success: Petitioner asserted success was expected because using multiple transition layers and single-mask etching processes were conventional, well-understood techniques in semiconductor fabrication that would yield predictable results when combined.

Ground 2: Claims 1-4 are obvious over Hikita-347, Beach, and Sheppard.

  • Prior Art Relied Upon: Hikita-347 (Application # 2006/0273347), Beach (WO 2005/057624), and Sheppard (Patent 7,238,560).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner asserted Hikita-347 served as a primary reference disclosing the layered structure of an enhancement mode GaN transistor similar to that of claim 1. To meet the limitations of dependent claims 2-4, Sheppard was cited for its teachings on using InAlGaN for the EPI and barrier layers. As in Ground 1, Sheppard was also relied upon for teaching multiple transition layers, and Beach was used to supply the single-mask gate etching process and ohmic contact formation steps, which Petitioner argued Hikita-347 does not explicitly disclose.
    • Motivation to Combine: A POSITA would incorporate Sheppard's teachings to improve Hikita-347's device quality with multiple transition layers and to use InAlGaN as an obvious material substitution to increase breakdown voltage and improve lattice matching. Beach would be combined to implement its known, efficient single-mask process to fabricate the gate and contact structures described conceptually in Hikita-347.
    • Expectation of Success: Petitioner argued success was expected, as substituting materials within the Group III nitride family (like InAlGaN) was a predictable design choice, and applying Beach's conventional masking techniques to Hikita-347's structure involved no technical hurdles.

Ground 3: Claim 5 is obvious over Hikita-023, Beach, and Sheppard.

  • Prior Art Relied Upon: Hikita-023 (Application # 2008/0079023), Beach (WO 2005/057624), and Sheppard (Patent 7,238,560).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Hikita-023 disclosed the method steps for forming the layered GaN transistor of claim 5, including growing an AlGaN layer and a GaN layer over the barrier. Sheppard was introduced to supply the teachings of forming multiple transition layers and using InAlGaN for the EPI layer. Beach was again relied upon to teach the single-mask etching process for the gate and multiple doped layers, as well as for forming the ohmic contacts.
    • Motivation to Combine: The motivations were analogous to other grounds. A POSITA would modify Hikita-023 with Sheppard's multiple transition layers to improve device quality and would integrate Beach’s well-established and simpler single-mask manufacturing process to realize the device structure taught by Hikita-023, thereby reducing complexity and cost.
    • Expectation of Success: Petitioner argued that a POSITA would have expected success in combining these known elements, as it involved applying conventional fabrication processes from Beach and known structural improvements from Sheppard to the base device structure from Hikita-023.

4. Arguments Regarding Discretionary Denial

  • Petitioner argued that discretionary denial is not warranted. Against denial under Fintiv, Petitioner asserted that the PTAB’s interim guidance precludes denial based on a parallel ITC proceeding. It was also argued that the co-pending district court case has been stayed and involves minimal investment, weighing against denial.
  • Against denial under §325(d), Petitioner contended the challenge is not based on cumulative prior art. It was argued that the primary references Yoshida, Beach, and Hikita-023 were never before the Examiner, and while Hikita-347 and Sheppard were of record, there was no evidence they were substantively considered or applied in the manner presented in the petition.

5. Relief Requested

  • Petitioner requested the institution of an inter partes review and the cancellation of claims 1-5 of Patent 8,404,508 as unpatentable.