Semiconductor Components Industries LLC v. Greenthread LLC

1. Case Identification

• Case #: IPR2024-00264
• Patent #: 10,734,481
• Filed: December 11, 2023
• Petitioner(s): Semiconductor Components Industries, LLC
• Patent Owner(s): Greenthread LLC
• Challenged Claims: 1-9, 13-27, and 31-36

2. Patent Overview

• Title: Semiconductor Device and Method for Fabricating the Same
• Brief Description: The ’481 patent describes a semiconductor device featuring a substrate with first and second active regions for forming transistors. The key inventive concept is the use of graded dopant concentrations in the active regions and/or adjacent well regions to create an electrical field that aids the movement of charge carriers away from the device surface and into the substrate, purportedly reducing soft errors.

3. Grounds for Unpatentability

Ground I: Obviousness over Kawagoe - Claims 1-9, 13-14, 16-27, and 31-36 are obvious over Kawagoe.

• Prior Art Relied Upon: Kawagoe (Patent 6,043,114).
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner argued that Kawagoe, a single reference, discloses all limitations of the challenged claims. Specifically, Kawagoe’s Embodiment 4 teaches a twin-well CMOS device with a first active region (for an nMOS transistor) and a second active region (for a pMOS transistor) on a substrate. Petitioner asserted that combining this structure with the uniformly-doped epitaxial substrate of Kawagoe’s Embodiment 1 would have been obvious. Kawagoe explicitly teaches that its p-wells and n-wells have impurity concentrations that are "gradually lowered in the depthwise direction," creating the claimed graded dopant concentration. Kawagoe explains this gradient attracts charge carriers (e.g., from an alpha-ray strike) toward the substrate body, thus aiding carrier movement as claimed and reducing soft errors in devices like DRAMs.
  • Motivation to Combine (for §103 grounds): A person of ordinary skill in the art (POSITA) would combine the twin-well device of Kawagoe's Embodiment 4 with the uniformly-doped substrate of Embodiment 1 because Kawagoe itself states the Embodiment 4 substrate is formed "as in the foregoing embodiment 1." Using the uniformly-doped substrate offered known benefits described in Kawagoe, such as excellent film quality, higher reliability, and lower manufacturing cost, making it a simple and advantageous design choice.
  • Expectation of Success (for §103 grounds): A POSITA would have had a reasonable expectation of success because Kawagoe describes in detail the use and benefits of both substrate types for forming CMOS devices and characterizes the improved latchup tolerance of an alternative substrate as just an additional, optional effect.

Ground II: Obviousness over Wieczorek and Wolf - Claims 1-2, 4-9, 13-22, 24-27, and 31-36 are obvious over Wieczorek in view of Wolf.

• Prior Art Relied Upon: Wieczorek (Application # 2003/0183856) and Wolf (a 2000 textbook, Silicon Processing for the VLSI Era).

• Core Argument for this Ground:

  • Prior Art Mapping: Petitioner contended that Wieczorek discloses a conventional prior-art twin-well CMOS device with all the core claimed features. Wieczorek shows a first active region (for an n-channel transistor) and a second active region (for a p-channel transistor) formed in respective P-wells and N-wells. Wieczorek’s figures illustrate that the dopant concentration in the channel and well regions is highest at the surface and decreases with depth, creating the claimed downward-sloping graded dopant concentration. Petitioner argued this known gradient inherently aids carrier movement into the substrate, consistent with representations made to the Patent Office during prosecution of a parent patent.
  • Motivation to Combine (for §103 grounds): A POSITA would combine Wieczorek with Wolf because Wieczorek teaches a conventional CMOS device but does not specify the substrate type. Wolf, a well-known textbook on semiconductor manufacturing, teaches that a uniform, lightly doped p-type or n-type substrate is commonly used for such twin-well CMOS devices. A POSITA would have looked to a standard reference like Wolf to supply this conventional detail for Wieczorek’s standard device.
  • Expectation of Success (for §103 grounds): A POSITA would have had a reasonable expectation of success as this combination merely applies a known substrate type (from Wolf) to a conventional CMOS process (from Wieczorek) to obtain the predictable result of a functional, standard CMOS device.

• Additional Grounds: Petitioner asserted four additional obviousness grounds. Grounds III and IV added Gupta (Patent 6,163,877), which teaches optimizing circuit layout to pack a plurality of transistors into an active region, to the Kawagoe and Wieczorek-Wolf combinations, respectively. Grounds V and VI added Silverbrook (Patent 6,614,560), which teaches a CMOS image sensor, to the Kawagoe and Wieczorek-Wolf combinations to render obvious the claims directed to an image sensor.

4. Key Technical Contentions (Beyond Claim Construction)

• Graded Dopants Inherently Aid Carrier Movement: A central technical argument was that a downward-sloping graded dopant concentration was well-known in the art to create an inherent "built-in" unidirectional electric field. Petitioner argued this field necessarily sweeps charge carriers from the device surface deep into the substrate, thus inherently performing the function of "aiding carrier movement" as claimed. This argument was supported by citing the prosecution history of a parent patent, where the applicant made the same admission.

5. Arguments Regarding Discretionary Denial

• §314(a) (Fintiv): Petitioner argued against discretionary denial under Fintiv, asserting that the merits of the petition are compelling. Further, the petition was filed well ahead of the district court trial in a related litigation, which is scheduled for September/October 2025, providing ample time for a Final Written Decision (FWD) to issue and simplify issues for trial. Petitioner also noted that the district court has not invested significant resources, weighing against denial.
• §325(d): Petitioner contended that denial under §325(d) is unwarranted because none of the primary prior art references (Kawagoe, Wieczorek, Wolf, Gupta, Silverbrook) were cited or considered by the examiner during the prosecution of the ’481 patent. The arguments presented in the petition are therefore not the same as or substantially similar to those previously before the Office, and the art is not cumulative to what was considered.

6. Relief Requested

• Petitioner requests institution of an inter partes review and cancellation of claims 1-9, 13-27, and 31-36 of the ’481 patent as unpatentable.