Monolithic Power Systems Inc v. Greenthread LLC

1. Case Identification

• Case #: IPR2024-00550
• Patent #: 10,510,842
• Filed: March 18, 2024
• Petitioner(s): Monolithic Power Systems, Inc.
• Patent Owner(s): Greenthread LLC
• Challenged Claims: 1-2, 4-9, 12-18

2. Patent Overview

• Title: Semiconductor Device with Graded Dopant Concentration
• Brief Description: The ’842 patent is directed to a semiconductor device whose layers have a graded dopant concentration. This gradient is purported to create a drift electric field that sweeps minority carriers from the semiconductor’s active region at the surface towards its substrate, thereby improving device performance.

3. Grounds for Unpatentability

Ground 1: Obviousness over Kawagoe - Claims 1-2, 4-9, and 12-18 are obvious over Kawagoe.

• Prior Art Relied Upon: Kawagoe (Patent 6,043,114).
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner argued that Kawagoe teaches every element of the challenged claims. Specifically, Kawagoe discloses a semiconductor device with a p-type substrate that includes both a p-type substrate body and a p-type epitaxial layer. Within this substrate, Kawagoe forms separate active regions containing PMOS and NMOS transistors within n-wells and p-wells, respectively. Critically, Petitioner asserted that Kawagoe teaches that these wells have a graded dopant concentration that is gradually lowered in the depthwise direction. This graded dopant profile is designed to create a concentration gradient that attracts minority carriers (e.g., electrons produced by alpha-ray strikes) toward the substrate body, thus aiding carrier movement away from the surface to reduce soft errors. This teaching was argued to meet the limitation of using a graded dopant concentration to aid carrier movement from the first surface to the second surface of the substrate.
  • Motivation to Combine (for §103 grounds): As this is a single-reference ground, the argument was that Kawagoe itself discloses all claimed features, making any necessary modifications obvious to a Person of Ordinary Skill in the Art (POSITA).
  • Expectation of Success (for §103 grounds): A POSITA would have had a high expectation of success as Kawagoe's own teachings directly address the problem of managing minority carriers using graded dopant profiles.

Ground 2: Obviousness over Onoda - Claims 1-2, 4-9, and 12-18 are obvious over Onoda.

• Prior Art Relied Upon: Onoda (Japanese Application H8-279598).
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner contended that Onoda, a reference describing a nonvolatile semiconductor storage device, discloses all elements of the challenged claims. Onoda teaches a semiconductor device built on a p-type substrate comprising a heavily-doped first layer and a lightly-doped second epitaxial layer. The device includes multiple active regions with both PMOS and NMOS transistors formed within corresponding n-type and p-type wells. Petitioner argued that Onoda explicitly discloses and illustrates a downward graded dopant profile across these well regions. This graded concentration decreases with depth and aids the movement of minority carriers away from the transistor active regions towards the lower part of the substrate, thereby improving resistance to latch-up. This was asserted to meet the key limitation of a graded dopant concentration aiding carrier movement from the surface to the substrate.
  • Motivation to Combine (for §103 grounds): This is a single-reference ground. Petitioner argued that Onoda inherently discloses or renders obvious all limitations of the challenged claims.
  • Expectation of Success (for §103 grounds): A POSITA would have expected success in implementing Onoda’s teachings, as it provides a complete device structure with graded doping to solve a well-known problem in CMOS technology.

Ground 3: Obviousness over Onoda in view of Nishizawa - Claims 1-2, 4-9, and 12-18 are obvious over Onoda in view of Nishizawa.

• Prior Art Relied Upon: Onoda (Japanese Application H8-279598) and Nishizawa (Patent 5,384,476).
• Core Argument for this Ground:
  • Prior Art Mapping: Onoda was relied upon for its disclosure of the primary semiconductor device structure, including the substrate, multiple active regions, and graded dopant profiles, as detailed in Ground 2. Nishizawa was introduced for its explicit teaching that a graded dopant profile in a buried region creates a drift electric field used to deliberately drift minority carriers (electrons) away from the surface and towards the substrate to prevent operational errors. Petitioner argued that Nishizawa’s express teachings on creating and using a drift field to manage minority carriers makes explicit what is inherent in Onoda.
  • Motivation to Combine (for §103 grounds): Petitioner argued a POSITA would combine Onoda and Nishizawa because both references are directed to similar semiconductor devices and address the same fundamental problem: controlling unwanted minority carrier movement (which causes latch-up in Onoda and memory errors in Nishizawa). A POSITA would have looked to Nishizawa’s clear explanation of using a graded dopant profile to create a drift field as a known and effective technique to apply to Onoda’s device to enhance its disclosed latch-up resistance.
  • Expectation of Success (for §103 grounds): A POSITA would have reasonably expected success because the combination involves applying a known principle (Nishizawa's drift field) to a known device structure (Onoda's) to achieve a predictable improvement in performance.

4. Arguments Regarding Discretionary Denial

• Petitioner argued that discretionary denial under §314(a) (considering Fintiv) or §325(d) would be inappropriate. The petition asserted it presents compelling evidence of unpatentability using prior art references (Onoda, Kawagoe, Nishizawa) that were never considered by the USPTO during prosecution of the ’842 patent. Petitioner further argued that the asserted art is not cumulative to art previously considered by the Examiner. Finally, Petitioner contended that denial under the General Plastic factors is unwarranted because this is its first petition against the ’842 patent, and it has no significant relationship with other petitioners who have filed separate IPRs.

5. Relief Requested

• Petitioner requests institution of an inter partes review and cancellation of claims 1-2, 4-9, and 12-18 of Patent 10,510,842 as unpatentable under 35 U.S.C. §103.