Advanced Micro Devices Inc v. XtreamEdge Inc

1. Case Identification

• Case #: IPR2025-00486
• Patent #: 10,873,753
• Filed: February 12, 2025
• Petitioner(s): Advanced Micro Devices, Inc. and Pensando Systems, Inc.
• Patent Owner(s): Concurrent Ventures, LLC and Xtreamedge, Inc.
• Challenged Claims: 1-4, 7-10, 13-15

2. Patent Overview

• Title: Platform for Data Flow Processing
• Brief Description: The ’753 patent describes a data flow processing platform comprising one or more chassis containing swappable pods or cards. These cards, which can include user-definable hardware and software modules, are coupled through a messaging interface network like Ethernet.

3. Grounds for Unpatentability

Ground 1: Obviousness over Stroud and DaSilva - Claims 1-3, 13, and 14 are obvious over Stroud in view of DaSilva.

• Prior Art Relied Upon: Stroud (Application # 2013/0346667A1) and DaSilva (Patent 9,148,389).
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner argued that Stroud taught a modular platform with one or more swappable cards in a chassis, communicating over an Ethernet backplane. Stroud also disclosed a packet header structure using sub-fields within a MAC address to identify the board ("board slot ID"), the module ("interface" identifier), the specific instance of a module ("processor or CLD number"), and the module type ("chip type"). This mapping was asserted to meet most limitations of independent claim 1. To address the "chassis identifier" limitation, Petitioner relied on DaSilva, which taught a multi-chassis network architecture where a "chassis ID" is included in packet headers to distinguish between chassis and properly route data. Dependent claims 2 and 3 were argued to be taught by Stroud’s disclosure of direct inter-card serial connections and processor cards with controllers for orchestrating data flows, respectively.
  • Motivation to Combine: Petitioner contended that a person of ordinary skill in the art (POSITA) would combine Stroud and DaSilva to scale Stroud’s single-chassis architecture. As Stroud's chassis filled up, the most straightforward way to expand capacity was to add more chassis. DaSilva provided a known solution for managing communication in such a multi-chassis environment by adding a chassis ID to packet headers. Both references shared the goal of creating reliable and flexible networking infrastructure, making the combination logical and predictable.
  • Expectation of Success: The combination was presented as simple, requiring only the addition of another sub-field to Stroud's existing header structure or using DaSilva's prepended header method. Petitioner argued that these were basic networking concepts that would predictably result in a scalable multi-chassis system without changing the principles of operation of either reference.

Ground 2: Obviousness over Stroud and Cragon - Claims 7, 9, and 10 are obvious over Stroud in view of Cragon.

• Prior Art Relied Upon: Stroud (Application # 2013/0346667A1) and Cragon ("Memory Systems and Pipelined Processors," a 1996 textbook).

• Core Argument for this Ground:

  • Prior Art Mapping: Petitioner asserted that Stroud’s swappable cards inherently contained a "plurality of types of memory" (e.g., SRAM, DRAM, Flash memory, hard disk), satisfying the preamble of claim 7's memory limitations. The core of this ground relied on Cragon, a textbook that explained fundamental memory arrangements. Petitioner argued Cragon taught the claimed selectable memory arrangements, including using different memory types as a "multilevel cache," "interleaved memory" to average access bandwidth, "swapped memory" using virtual memory to move data between main memory and disk, and memory "allocated to specified address ranges according to parameterized task needs" using bounds registers. Claim 9, which requires bypassing the main network, was allegedly taught by Stroud’s direct serial connections.
  • Motivation to Combine: Stroud disclosed a flexible, user-configurable platform intended for a wide variety of applications. Petitioner argued a POSITA would be motivated to implement well-known and efficient memory arrangements, as taught by a standard textbook like Cragon, to support these diverse applications and optimize performance. Applying Cragon's foundational teachings would allow a user to select the best memory configuration (e.g., multilevel cache for speed, swapped memory for capacity) for a specific task running on Stroud's platform.
  • Expectation of Success: Implementing the textbook memory arrangements from Cragon on Stroud's hardware platform was argued to be straightforward and well within the skill of a POSITA. These were routine techniques used for decades, and a skilled artisan would have a high expectation of success in applying them to the various memory types already present on Stroud's cards.

• Additional Grounds: Petitioner asserted additional obviousness challenges. Ground 3 added Saulsbury (Application # 2002/0087821) to the Stroud/Cragon combination, arguing Saulsbury provided further teachings on selecting between memory modes (e.g., physical vs. cache memory). Ground 4 challenged dependent claims 4, 8, and 15 by combining the packet header teachings from Ground 1 (Stroud/DaSilva) with the memory arrangement teachings from Ground 3 (Stroud/Cragon/Saulsbury).

4. Key Claim Construction Positions

• "memory superposition": Petitioner adopted the Patent Owner's proposed construction from district court: "two or more types of memory that can be made available for a data flow or other data processing operation."
• "interleaved memory": Petitioner proposed this term means "an arrangement of different types of memory that are alternately accessed to achieve an average access bandwidth," based on the patent's specification.
• "swapped memory over a specified address range": Petitioner argued this term of art means "memory with a specified address range where information is moved between the memory and non-volatile storage," such as disk, consistent with technical dictionary definitions.

6. Arguments Regarding Discretionary Denial

• Petitioner argued against discretionary denial under Fintiv, stating that the parallel district court case is in its early stages with no claim construction briefing having occurred. Furthermore, a pending transfer of venue would likely reschedule the trial date, which is currently set for May 2026. Petitioner also contended that denial under §325(d) is unwarranted because the primary prior art references (Stroud, DaSilva, Saulsbury, and Cragon) were not cited or considered during the original prosecution of the ’753 patent.

7. Relief Requested

• Petitioner requests the institution of an inter partes review and the cancellation of claims 1-4, 7-10, and 13-15 of the ’753 patent as unpatentable.