PTAB

IPR2025-00721

Innoscience America Inc v. Infineon Technologies Austria AG

Key Events
Petition
petition

1. Case Identification

2. Patent Overview

  • Title: Electronic Component Having a Compound Semiconductor Transistor Device
  • Brief Description: The ’481 patent discloses an electronic component featuring a lateral compound semiconductor transistor device, such as a Gallium Nitride (GaN) device, arranged in a specific packaging layout. The claims focus on the configuration of a die pad, multiple leads, and their electrical connections to the transistor’s electrodes, including a third lead for source sensing functionality.

3. Grounds for Unpatentability

Ground 1: Claims 1-3, 5, 6, 10, 11, and 16 are obvious over Nega in view of Roberts.

  • Prior Art Relied Upon: Nega (Application # 2014/0110760) and Roberts (Application # 2014/0175454).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Nega discloses all elements of independent claims 1 and 10 except for the third lead providing "source sensing functionality." Nega allegedly teaches a lateral GaN transistor device with a die pad (lead frame LF1), a first lead and second lead (outer leads OL1), and the claimed couplings of the control, first current, and second current electrodes. To supply the missing element, Petitioner asserted that Roberts teaches a "Kelvin Source Sense" connection (lead SS) for a GaN transistor to enable cleaner driving of the source by reducing inductive noise.
    • Motivation to Combine: A POSITA would combine Roberts’s source sensing lead with Nega’s transistor package to gain the known benefits of improved performance and noise reduction. Petitioner argued that implementing a Kelvin source sense connection was a well-known technique to solve the common problem of switching noise in high-frequency devices like the one disclosed in Nega.
    • Expectation of Success: A POSITA would have an expectation of success because adding a separate source-sensing lead was a known design modification for improving transistor performance, involving the application of predictable and conventional packaging techniques.

Ground 2: Claims 4, 9, and 17 are obvious over Nega in view of Roberts and Otremba124.

  • Prior Art Relied Upon: Nega (Application # 2014/0110760), Roberts (Application # 2014/0175454), and Otremba124 (Application # 2014/0225124).
  • Core Argument for this Ground:
    • Prior Art Mapping: This ground builds on Ground 1 by adding Otremba124 to teach the packaging limitations of claims 4, 9, and 17. Petitioner contended that while Nega and Roberts teach the core transistor and source-sensing functionality, they do not explicitly disclose a leadless package where the lower surfaces of the die pad and leads are exposed and substantially planar. Otremba124 allegedly remedies this by disclosing a power transistor in a "ThinPAK8x8" leadless package, which features flat, exposed leads and an exposed die pad on the bottom of the housing for surface mounting.
    • Motivation to Combine: A POSITA would combine the Nega/Roberts device with the packaging of Otremba124 to achieve the known benefits of leadless designs. These benefits included a smaller footprint on a printed circuit board, faster switching performance, and improved thermal dissipation compared to leaded packages like the TO220 package suggested in Nega. Using a standard, high-performance package like ThinPAK8x8 was presented as a predictable design choice.
    • Expectation of Success: Success was expected because modifying a device to fit into a known, advantageous package type was a routine task for a package designer, applying conventional techniques to achieve predictable improvements.

Ground 3: Claims 1, 2, and 4-6 are obvious over Liu.

  • Prior Art Relied Upon: Liu (Patent 10,930,524).

  • Core Argument for this Ground:

    • Prior Art Mapping: Petitioner argued that Liu, as a single reference, discloses all limitations of claim 1 and its dependents 2 and 4-6. Liu allegedly discloses a semiconductor component with a compound semiconductor chip (a III-nitride chip), a die pad (device receiving area 138), and first, second, and third leads (leadframe leads 26, 30, and 28). Petitioner mapped Liu’s gate, drain, and source contacts to the claimed electrodes and their connections. Crucially, Petitioner asserted that Liu’s third lead (lead 28) is described as a "Kelvin leadframe lead," thereby inherently providing the claimed "source sensing functionality." Liu was also argued to teach the lateral transistor structure and the use of bond wires for connections.
    • Motivation to Combine: N/A (single reference ground).
    • Expectation of Success: N/A (single reference ground).
  • Additional Grounds: Petitioner asserted numerous additional obviousness challenges, including grounds based on Liu in view of Roberts, Otremba433, and Otremba280 to teach various packaging and connection features like leadless designs and the use of contact clips instead of bond wires. Further grounds based on Nega in combination with Roberts, Otremba433, Otremba280, and Otremba631 were also asserted to challenge claims related to contact clips, separate transistor housings, and heat dissipation members.

4. Arguments Regarding Discretionary Denial

  • Petitioner argued that discretionary denial under Fintiv would be improper. With respect to a co-pending district court case, Petitioner noted the case has been stayed with minimal investment from the parties. Regarding a parallel ITC investigation, Petitioner contended that key Fintiv factors favor institution because the ITC lacks authority to invalidate claims, not all challenged claims are at issue in the ITC, and the merits of the petition are strong, warranting review to ensure fairness and efficiency.

5. Relief Requested

  • Petitioner requests institution of an inter partes review and cancellation of claims 1-17 of Patent 9,899,481 as unpatentable.