Intel Corp v. Advanced Cluster Systems Inc

1. Case Identification

• Case #: IPR2025-00794
• Patent #: 10,333,768
• Filed: March 28, 2025
• Petitioner(s): Intel Corporation
• Patent Owner(s): Advanced Cluster Systems, Inc.
• Challenged Claims: 1-25, 30-34

2. Patent Overview

• Title: System for Parallel Processing of Mathematical Applications on Computer Clusters
• Brief Description: The ’768 patent discloses a system for adapting single-computer mathematical software applications (e.g., Mathematica) to run in parallel on a computer cluster. The system uses cluster node modules to distribute tasks and communicate results among multiple processing nodes in a peer-to-peer architecture.

3. Grounds for Unpatentability

Ground 1: Obviousness over Menon, Trefethen, RS6000, and POEref - Claims 1-25 and 30 are obvious over Menon in view of Trefethen, RS6000, and POEref.

• Prior Art Relied Upon: Menon (a 1997 conference paper, "MultiMATLAB: Integrating MATLAB with High-Performance Parallel Computing"), Trefethen (a 1996 technical report, "MultiMATLAB: MATLAB on Multiple Processors"), RS6000 (an IBM product manual for the RS/6000 SP system), and POEref (an IBM product manual for the Parallel Operating Environment).
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner argued that the combination of Menon and Trefethen, authored by the same Cornell research team, described "MultiMATLAB," a system that enabled the MATLAB mathematical software to run in parallel on multiple processors. This system is alleged to be analogous to the ’768 patent's claimed invention for Mathematica. Menon was argued to teach a computer cluster with multiple nodes, each running a MATLAB process and communicating via a peer-to-peer architecture using Message Passing Interface (MPI). Trefethen was argued to provide a specific implementation example, including code showing a sequential, daisy-chained data processing flow across three or more nodes (node 0 to 1, 1 to 2, etc.), a key limitation of the challenged claims. RS6000 and POEref, as IBM product manuals, were asserted to disclose the underlying hardware and operating environment that Menon explicitly states MultiMATLAB was designed for, thereby providing conventional details for elements like hardware processors, memory, and cluster initialization processes.
  • Motivation to Combine: A POSITA would combine Menon and Trefethen because they describe the same "MultiMATLAB" project, were authored by the same team, and Menon expressly cites Trefethen. Further, because Menon specified that MultiMATLAB was implemented on an "IBM SP2" system using IBM's "Parallel Operating Environment (POE)," a POSITA would be directly motivated to consult the corresponding official product manuals (RS6000 and POEref) to understand the well-known details of that standard, commercially available platform.
  • Expectation of Success: A POSITA would have had a high expectation of success, as Menon and Trefethen are not theoretical proposals but descriptions of a successfully implemented and tested system. The combination merely involved applying the MultiMATLAB software architecture to the specific hardware platform for which it was designed.

Ground 2: Obviousness over Menon, Trefethen, RS6000, and POEref, further in view of MPIref - Claims 31-34 are obvious over the combination in Ground 1 further in view of MPIref.

• Prior Art Relied Upon: The references from Ground 1, plus MPIref (the 1994 "Message-Passing Interface Standard" publication).
• Core Argument for this Ground:
  • Prior Art Mapping: This ground builds upon the combination in Ground 1 to address the more detailed communication protocol limitations of claims 31-34, which recite intercommunication during thread execution and specific asynchronous send/receive commands. Petitioner argued that while Menon discloses using MPI, MPIref provides the definitive standard for MPI. MPIref was asserted to explicitly describe the technical details of the MPI communication protocol, including its support for "thread-safe" execution, the syntax for asynchronous send and receive commands (MPI_SEND, MPI_RECV), and the use of parameters for defining payloads (data), destinations, and message specifiers. These teachings were alleged to map directly onto the specific limitations of claims 31-34.
  • Motivation to Combine: The motivation was argued to be explicit and direct. Menon states it uses the "MPI communication standard" as its underlying communication substrate. A POSITA seeking to implement or understand Menon's system would be immediately motivated to consult MPIref, the official MPI standard, to learn the precise functions, syntax, and capabilities of the communication protocol being used.
  • Expectation of Success: Because Menon already demonstrated a working parallel system using MPI, a POSITA would have reasonably expected that implementing the specific, standardized features detailed in MPIref (like asynchronous calls and thread support) would be successful and predictable.

4. Key Claim Construction Positions

• "peer-to-peer architecture": Petitioner adopted the construction previously advanced by the Patent Owner: "an architecture in which each node can communicate tasks and data with other nodes without the tasks and data being required to go through a central server or master node." Petitioner argued the prior art combination explicitly discloses this architecture.
• "a mechanism for...": Petitioner contended this term, as used in claim 1, invoked means-plus-function treatment under pre-AIA 35 U.S.C. § 112, sixth paragraph. The recited function is communicating results of mathematical evaluations, and the corresponding structure disclosed in the ’768 patent's specification is an "MPI module." This construction allows the MPI-based communication layers taught by the prior art to be mapped directly onto this claim limitation.

5. Arguments Regarding Discretionary Denial

• Petitioner argued that discretionary denial would be inappropriate. Regarding Fintiv, Petitioner asserted that it had filed a Sotera stipulation in the parallel district court litigation, the district court trial is scheduled for after the statutory deadline for a Final Written Decision (FWD), and investment in the litigation is minimal. Regarding §325(d) and Advanced Bionics, Petitioner argued the prior art combination was not considered by the Examiner during prosecution and is materially different from the art asserted in prior, unsuccessful IPRs against the patent, as Trefethen allegedly supplies the specific sequential processing teachings the Board previously found missing. Regarding General Plastic, Petitioner emphasized that it is a different petitioner from the one in the prior IPRs (NVIDIA) and that it did not coordinate with the previous filer.

6. Relief Requested

• Petitioner requests institution of an inter partes review (IPR) and cancellation of claims 1-25 and 30-34 of the ’768 patent as unpatentable.