Taiwan Semiconductor Mfg Co Ltd v. Advanced Integrated Circuit Process LLC

1. Case Identification

• Case #: IPR2025-00832
• Patent #: 8,796,779
• Filed: April 11, 2025
• Petitioner(s): Taiwan Semiconductor Manufacturing Company, Ltd.
• Patent Owner(s): Advanced Integrated Circuit Process LLC
• Challenged Claims: 1, 8-15

2. Patent Overview

• Title: Semiconductor Device
• Brief Description: The ’779 patent discloses a semiconductor device comprising at least two Metal-Insulator-Semiconductor (MIS) transistors of the same conductivity type on a single substrate. Each transistor includes a gate insulating film composed of an interface layer and a high dielectric constant (high-k) insulating film, with the purported novelty being that the interface layer of one transistor is thicker than that of the other to create different effective work functions.

3. Grounds for Unpatentability

Ground 1: Anticipation by Torii - Claims 1, 12-15 are anticipated by Torii under 35 U.S.C. §102.

• Prior Art Relied Upon: Torii (Patent 6,881,657).
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner argued that Torii disclosed every limitation of claims 1 and 12-15. Torii described a semiconductor device with both a low stand-by power (LSTP) transistor and a low operating power (LOP) transistor of the same conductivity type (n-type) on an identical substrate. Each transistor had a gate insulating film comprising a silicon oxynitride film (the "interface layer") and a high-k film. Crucially, Torii specified that the interface layer of the LSTP transistor ("first MIS transistor") was thicker (about 1.3 nm) than that of the LOP transistor ("second MIS transistor," about 0.9-0.95 nm).
  • Key Aspects: Petitioner contended that this explicit disclosure of different interface layer thicknesses results in different Equivalent Oxide Thicknesses (EOTs), which the ’779 patent itself equates to different effective work functions. Therefore, Torii’s LSTP transistor, having a higher EOT, inherently had a higher effective work function than the LOP transistor, anticipating claim 15. Torii also disclosed using hafnia for the high-k film and making the high-k films and gate electrodes of identical material and thickness, anticipating dependent claims 12-14.

Ground 2: Obviousness over Torii and Mise - Claims 8-11 are obvious over Torii in view of Mise under 35 U.S.C. §103.

• Prior Art Relied Upon: Torii (Patent 6,881,657) and Mise (Application # 2010/0258878).
• Core Argument for this Ground:
  • Prior Art Mapping: Torii provided the foundational device with two same-conductivity transistors having different interface layer thicknesses. Claims 8-11 add limitations requiring cap films containing specific elements (aluminum for pMIS transistors, lanthanum for nMIS transistors) on the high-k insulating film. Petitioner argued that Mise taught the use of these exact cap layers. Mise disclosed using an AlO cap layer for p-type MOSFETs and a LaO cap layer for n-type MOSFETs to beneficially adjust transistor threshold voltages.
  • Motivation to Combine: A POSITA would combine Mise’s cap layer technology with Torii’s device to improve transistor performance. It was well-known that using metal gates with high-k dielectrics (an improvement over Torii's polysilicon gates) often required threshold voltage adjustment. Mise's cap layers provided a known solution for fine-tuning these voltages, improving channel mobility, and avoiding Fermi-level pinning.
  • Expectation of Success: A POSITA would have a reasonable expectation of success, as Mise described forming the cap layers and metal gates using conventional, well-known deposition processes like atomic layer deposition (ALD) and sputtering.

Ground 3: Obviousness by Gilmer - Claims 1, 12-15 are obvious over Gilmer under 35 U.S.C. §103.

• Prior Art Relied Upon: Gilmer (Patent 6,787,421).
• Core Argument for this Ground:
  • Prior Art Mapping: Gilmer disclosed a semiconductor device with two transistor regions—a core region and an I/O region—on an identical substrate. Each transistor had an interface layer and a high-k metal oxide layer. Gilmer repeatedly taught making the I/O transistor's interface layer ("first interface layer") thicker (e.g., 3-5 nm) to handle higher voltages, while the core transistor's layer ("second interface layer") was thinner (e.g., 0.4-1.2 nm). Petitioner argued this structure met the core limitations of claim 1.
  • Motivation to Combine: While Gilmer did not explicitly state the core and I/O transistors were of the same conductivity type, Petitioner contended this would have been an obvious design choice to a POSITA. A POSITA would have understood that devices with multiple transistors of the same type but different performance characteristics (like core and I/O) were common. Making them the same conductivity type was one of only two simple alternatives (same vs. different types) and was a well-known configuration.
  • Key Aspects: As in the Torii analysis, the disclosed difference in interface layer thickness in Gilmer would lead to different EOTs and thus different effective work functions, rendering claim 15 obvious.
• Additional Grounds: Petitioner asserted additional obviousness challenges, including combining Torii with Yu (Patent 6,693,333) to show modifying a metal gate work function was obvious for claim 15, and combining Gilmer with Chen (Patent 7,382,023) to explicitly supply the teaching of same-conductivity transistors. A final ground combined Gilmer, Chen, and Mise.

4. Arguments Regarding Discretionary Denial

• Petitioner argued that discretionary denial would be inappropriate.
• §314(a) (Fintiv): Petitioner stipulated that, if the IPR is instituted, it will not pursue in the related district court proceeding any invalidity ground that it raised or reasonably could have raised in the IPR.
• §325(d): Petitioner argued that although a publication corresponding to Gilmer was cited during prosecution of the ’779 patent, it was never applied by the Examiner. Therefore, the Office did not previously evaluate the substantive arguments presented in the petition, which Petitioner asserted constitute a compelling case of unpatentability.

5. Relief Requested

• Petitioner requested institution of an inter partes review and cancellation of claims 1 and 8-15 of the ’779 patent as unpatentable.