Marvell Semiconductor Inc v. Credo Technology Group Ltd

1. Case Identification

• Case #: IPR2025-01218
• Patent #: 10,877,233
• Petitioner(s): Marvell Semiconductor, Inc.
• Patent Owner(s): Credo Technology Group Ltd.
• Challenged Claims: 1-20

2. Patent Overview

• Title: Active Electrical Cable
• Brief Description: The ’233 patent discloses an active electrical cable designed for high-speed communications. The invention focuses on using preset transmit-side pre-equalization within data recovery and re-modulation (DRR) devices at each end of the cable to enhance signal performance and reduce receive-side equalization requirements.

3. Grounds for Unpatentability

Ground 1: Obviousness over Lugthart and Gorecki - Claims 1-20 are obvious over Lugthart in view of Gorecki.

• Prior Art Relied Upon: Lugthart (Patent 9,882,706) and Gorecki (Patent 7,233,617).
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner argued that Lugthart taught all elements of independent claims 1, 8, and 15. Specifically, Lugthart disclosed an active cable with a symmetric pair of DRR devices (transceivers) at each end, connected by electrical conductors. These devices exchange multi-lane data streams with host ports via pluggable connectors and perform pre-equalization on outbound signals using FIR filters to compensate for channel loss. Petitioner contended the only potential gap in Lugthart's teaching was the explicit storage of transmit filter coefficient values in nonvolatile memories. Gorecki was introduced to cure this, as it explicitly taught using "pre-programmed" or "pre-set" tap coefficient values for transmit-side FIR equalization filters and storing them in nonvolatile memories like ROM or EEPROM.
  • Motivation to Combine: A Person of Ordinary Skill in the Art (POSITA) would combine Gorecki's teaching with Lugthart's active cable design for a simple, predictable reason: to ensure that pre-equalization coefficients are preserved when the cable is powered off or disconnected. This would allow the coefficients to be loaded quickly at power-on, a practical necessity for a reusable cable. Petitioner asserted this was a combination of known prior art elements to yield a predictable result.
  • Expectation of Success: A POSITA would have had a high expectation of success. Storing configuration data like filter coefficients in nonvolatile memory was a routine and well-established practice in the field, ensuring data persistence with no technical hurdles. The combination simply applied a standard data storage solution (Gorecki) to a known active cable system (Lugthart).

Ground 2: Obviousness over Cornelius, Samaan, and Gorecki - Claims 1-20 are obvious over Cornelius in view of Samaan and Gorecki.

• Prior Art Relied Upon: Cornelius (Patent 8,516,238), Samaan (High-Speed Serial Bus Repeater Primer, Intel Corp., Revision 1.2), and Gorecki (Patent 7,233,617).

• Core Argument for this Ground:

  • Prior Art Mapping: Petitioner argued this combination also taught all challenged claims. Cornelius, related to Apple's Thunderbolt technology, disclosed the high-level architecture of an active cable with symmetric retimer/CDR circuits in active plugs at each end for re-timing data and employing equalization, including "emphasis, and de-emphasis" (a form of pre-equalization). Petitioner asserted that Samaan, an Intel technical primer on retimers, provided the necessary implementation details for the circuits in Cornelius, teaching specific retimer architectures (both protocol-aware and unaware) that use a transmit equalizer (TxEQ) with an FIR filter to perform pre-equalization. Gorecki was again cited for its express teaching of storing "pre-set" FIR filter coefficients in nonvolatile memory.
  • Motivation to Combine: A POSITA developing an active cable based on the well-known Apple/Intel Thunderbolt technology (Cornelius) would have been motivated to consult Intel's technical publications (Samaan) for specific retimer architectures and implementation details. Since Cornelius described circuits for retiming but lacked specific schematics, Samaan was a natural source to fill in the gaps. A POSITA would then incorporate Gorecki's teaching for the same reason as in the first ground: to non-volatilely store the preset coefficients taught by Cornelius, ensuring they are available for loading during operation.
  • Expectation of Success: Success would have been reasonably expected. The combination involved applying a detailed, standard retimer architecture (Samaan) to a conceptual active cable (Cornelius) from the same technological ecosystem (Thunderbolt) and using a conventional method for storing configuration data (Gorecki).

• Additional Grounds: Petitioner asserted that claims 1, 6, 8, 13, and 15 are obvious over Lugthart alone, arguing Lugthart teaches or suggests storing its DSP software and data structures, including coefficients, in nonvolatile memory. Petitioner also asserted a ground for claims 7, 14, and 20 over Lugthart, Gorecki, and Samaan, where Samaan was used to further teach disabling pre-equalization by setting FIR filter tap coefficients to zero.

4. Key Claim Construction Positions

• "inbound"/"outbound": Petitioner noted that the ’233 patent explicitly defined "inbound" and "outbound" from the host's perspective. This construction was used to map the data flow described in prior art references like Lugthart to the claim limitations, demonstrating that the prior art transceivers exchange data streams in both directions relative to the host interface.

5. Relief Requested

• Petitioner requests the institution of an inter partes review and cancellation of claims 1-20 of Patent 10,877,233 as unpatentable under 35 U.S.C. §103.