PTAB

IPR2025-01396

BOE Technology Group Co Ltd v. 138 East LCD Advancements Ltd

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Petition
petition

1. Case Identification

2. Patent Overview

  • Title: Electro-Optical Panel and Apparatus
  • Brief Description: The ’146 patent discloses an electro-optical panel, such as a liquid crystal display (LCD), featuring a specific layout and relative sizing of input terminals on a substrate. The alleged invention centers on making the clock signal input terminals larger in area than the image signal input terminals, and the power source terminals not smaller than the clock signal terminals, to improve electrical performance and connection reliability.

3. Grounds for Unpatentability

Ground 1: Claims 10-23 are obvious over Kitawada in view of Kawaguchi, Matsumoto, and Minami or Sano

  • Prior Art Relied Upon: Kitawada (JP H11282011A), Kawaguchi (JP 2000231115A), Matsumoto (Electronic Display Devices, 1990), Minami (JP H03-125334), and Sano (JP H10282516A).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Kitawada taught a conventional LCD panel with most claimed elements, including a substrate, pixels, data and scanning lines, and drive circuits. Kitawada also disclosed clock, image, and power terminals arranged along one side of the substrate. To supply missing elements, Petitioner asserted that Matsumoto taught supplying image signals "simultaneously" to all data lines, and Kawaguchi taught using an "external" data drive circuit, a simple and predictable design choice. The key limitation not expressly disclosed by Kitawada was the relative sizing of the terminals—specifically, the clock-signal input terminal overlapping its wiring by a larger area than the image-signal terminals overlap theirs.
    • Motivation to Combine: Petitioner asserted two independent motivations to modify Kitawada to include larger clock signal terminals. First, Minami addressed known mechanical problems with bonding fine-pitch terminals near the edges of a substrate using anisotropic conductive film (ACF). Minami taught making these outer terminals wider to prevent connection failures from mismatch and stress. Because Kitawada’s clock terminals are located at the outer edges, a POSITA would combine Minami's teaching to enlarge them for improved reliability. Second, Sano provided an independent electrical motivation, teaching that terminals for high-frequency signals, like clock signals, must have a larger area (and thus lower resistance) to prevent signal waveform distortion and circuit malfunction.
    • Expectation of Success: A POSITA would have had a high expectation of success, as modifying terminal sizes based on well-understood mechanical bonding principles and fundamental electrical requirements were predictable solutions to known problems in LCD manufacturing.

Ground 2: Claims 1-9 are obvious over Kitawada in view of Kawaguchi, Matsumoto, and Minami or Sano or Kato

  • Prior Art Relied Upon: Kitawada (JP H11282011A), Kawaguchi (JP 2000231115A), Matsumoto (Electronic Display Devices, 1990), Minami (JP H03-125334), Sano (JP H10282516A), and Kato (Application # 2002-0018169A1).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued this combination rendered claims 1-9 obvious, with Kitawada again providing the base system. This ground focused on limitations in independent claim 1, such as the power source terminal having an area "not smaller" than the clock signal terminal [1h] and the clock signal terminal having a "larger area" than the image signal terminal [1i]. The mapping for the larger clock signal terminal relied on the same rationale as Ground 1. For the power source terminal, Petitioner turned to Kato. Additionally, Petitioner argued that Minami taught that the pitch interval of adjacent clock signal terminals could be an "integer multiple" of the image signal terminal pitch [1l] as an obvious consequence of arranging terminals of different widths.
    • Motivation to Combine: The motivation to enlarge Kitawada’s clock signal terminals relative to its image signal terminals was identical to Ground 1, citing the independent mechanical (Minami) and electrical (Sano) reasons. To motivate making the power source terminals at least as large as the clock terminals, Petitioner argued Kato taught that power terminals must handle larger currents and therefore required a larger area to lower resistance and prevent voltage drops. A POSITA would also have been motivated by Minami's mechanical rationale, as Kitawada's power terminals are also located near the outer edge of the substrate, adjacent to the clock terminals.
    • Expectation of Success: A POSITA would have expected that resizing power terminals to handle higher currents would predictably improve the device's power integrity, just as resizing clock terminals would improve signal fidelity and mechanical bonding.

4. Key Claim Construction Positions

  • Petitioner argued that express claim construction was not necessary but addressed two means-plus-function terms from claims 5 and 6.
  • “power source means for supplying the power source”: Petitioner contended this term does not invoke 35 U.S.C. §112 ¶6 because "power source" recites sufficient structure. Alternatively, if construed as a means-plus-function term, the specification disclosed a corresponding structure in "power source circuit 500."
  • “signal generation means for supplying the input signals”: Petitioner argued this term also may not invoke §112 ¶6 as a "signal generator" was a well-known structure. If it did, the specification disclosed corresponding structures, including the data-line drive circuit, timing generation circuit, and image processing circuit.

5. Relief Requested

  • Petitioner requests institution of IPR and cancellation of claims 1-23 of Patent 7,636,146 as unpatentable.