BOE Technology Group Co Ltd v. 138 East LCD Advancements Ltd

1. Case Identification

• Case #: IPR2025-01412
• Patent #: 8,391,020
• Filed: September 5, 2025
• Petitioner(s): BOE Technology Group Co., Ltd.
• Patent Owner(s): 138 East LCD Advancements Limited
• Challenged Claims: 1-13

2. Patent Overview

• Title: Electro-optical device, electro-optical panel, and electronic apparatus
• Brief Description: The ’020 patent discloses methods for checking the electrical connectivity between a liquid-crystal display (LCD) panel and its associated flexible circuit substrates. The invention provides specific connection wiring configurations on the LCD panel that interconnect various terminals, allowing for electrical resistance measurements to confirm proper connections during manufacturing.

3. Grounds for Unpatentability

Ground 1: Obviousness over Takenaka - Claims 1-7, 11, and 12 are obvious over Takenaka.

• Prior Art Relied Upon: Takenaka (Application # 2008/0291379).
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner argued that Takenaka, which aims to stabilize reference voltage in large LCD panels, discloses all elements of the challenged claims. Takenaka teaches an LCD device with an electro-optical panel, multiple circuit substrates (semiconductor devices on flexible boards), and various terminal portions. Petitioner asserted that Takenaka’s use of common wires (CW3, CW10) and a common bus line (CBL) to connect terminals on the panel and substrates directly corresponds to the "first connection wiring" and "second connection wiring" recited in independent claims 1 and 11. Specifically, Petitioner mapped Takenaka's common lines to show electrical paths connecting different terminal pairs, fulfilling the core limitations of the claims. The dependent claims were addressed by arguing they recite minor, well-known variations of panel layout and wiring arrangements also disclosed or suggested by Takenaka, such as wiring extending around the display region (claim 2) and specific terminal placements (claims 3-7).
  • Motivation to Combine (for §103 grounds): As a single-reference ground, the motivation was framed as an obvious modification. Petitioner contended that a person of ordinary skill in the art (POSITA), reviewing Takenaka's disclosure of various wiring configurations for voltage stabilization, would find it obvious to implement the specific connection schemes claimed in the ’020 patent. Petitioner argued these schemes represent simple, predictable design choices for routing electrical connections on an LCD panel, fully within the scope of Takenaka's teachings.
  • Expectation of Success (for §103 grounds): A POSITA would have a high expectation of success because implementing the claimed wiring configurations in Takenaka's system involves applying basic, well-understood principles of circuit design on a display panel, a predictable art.

Ground 2: Obviousness over Takenaka and Ito - Claims 8-10 are obvious over Takenaka in view of Ito.

• Prior Art Relied Upon: Takenaka (Application # 2008/0291379) and Ito (Japanese Application # 2009168877A).
• Core Argument for this Ground:
  • Prior Art Mapping: This ground addresses independent claim 8, which requires a "third terminal portion arranged on a side opposed to a display region with respect to the first terminal portion." Petitioner argued that while Takenaka provides the foundational LCD structure with connection wiring, it does not explicitly disclose this specific opposing arrangement. Ito, however, directly teaches this configuration to solve issues related to heat concentration and miniaturization in displays with overlapping flexible substrates. Ito explicitly shows a first set of connecting terminals (102b) on one side of a display region (10a) and a second set of connecting terminals (102a) on the opposite side. Petitioner asserted that combining Ito’s terminal arrangement with Takenaka’s wiring scheme renders claim 8 and its dependent claims 9-10 obvious.
  • Motivation to Combine (for §103 grounds): A POSITA would combine these references because both were driven by the same market force: improving display quality and reliability as pixel density increases. Takenaka addresses electrical stability, while Ito addresses physical layout and thermal issues. A POSITA would have been motivated to incorporate Ito’s efficient terminal layout into Takenaka’s electrically stable design to achieve a display that is both reliable and compact. The combination was presented as a simple repositioning of terminal portions, representing one of a finite number of predictable design choices.
  • Expectation of Success (for §103 grounds): Success was reasonably expected because combining the teachings involves modifying the physical layout of terminals, a straightforward task for a display engineer, without altering the fundamental electrical principles disclosed in Takenaka.

Ground 3: Obviousness over Takemura - Claims 1-7 and 13 are obvious over Takemura.

• Prior Art Relied Upon: Takemura (Japanese Application # H0643473A).
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner argued that Takemura, which solves the same problem as the ’020 patent (checking terminal connection quality), renders the claims obvious. Takemura discloses an LCD panel with groups of terminals and teaches short-circuiting terminals at each end of a group to test connection integrity by measuring resistance. Petitioner asserted that Takemura's "auxiliary capacitance lines" or "rescue lines" that connect these panel terminals function identically to the "connection wiring" claimed in the ’020 patent. Takemura's disclosure of using two or more flexible substrates (TABs), each with its own connection terminals, was mapped to the claimed first and second circuit substrates. Dependent claims were allegedly met by Takemura’s disclosure of rescue lines extending around the display region (claim 2) and its depiction of terminal groups on multiple sides of the panel (claims 4-7).
  • Motivation to Combine (for §103 grounds): As a single-reference ground, Petitioner argued it would have been obvious for a POSITA to apply Takemura's teachings to arrive at the claimed invention. Takemura explicitly discloses the concept of using on-panel wiring to check external connections, and the specific configurations in the ’020 patent claims were presented as minor design variations of Takemura’s fundamental solution.
  • Expectation of Success (for §103 grounds): A POSITA would have had a high expectation of success in implementing the claimed wiring, as it is a direct application of the connection-checking principles already taught by Takemura for the same purpose.

4. Key Claim Construction Positions

• “arranged on a side opposed to a display region with respect to the first terminal portion” (Claim 8): Petitioner proposed this term means "arranged on an opposite side of the first terminal portion from the display region." This construction was asserted to be critical for the obviousness argument combining Takenaka with Ito, as Ito explicitly discloses terminals on opposite sides of a display region.
• “connection wiring” (Claims 1, 2, 5, 6, 8, 9, 11): Petitioner proposed this term should be construed as "circuit path." This broader construction was argued to be necessary because the ’020 patent describes wiring that can "creep between layers" and is not limited to physical wires. This construction allows prior art disclosing printed circuit paths, like the lines in Takenaka and Takemura, to meet the claim limitation.

5. Relief Requested

• Petitioner requests institution of an inter partes review and cancellation of claims 1-13 of Patent 8,391,020 as unpatentable.