PTAB

IPR2025-01412

BOE Technology Group Co., Ltd. v. 138 EAST LCD ADVANCEMENTS LIMITED

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1. Case Identification

2. Patent Overview

  • Title: Electro-optical device, electro-optical panel, and electronic apparatus
  • Brief Description: The ’020 patent discloses a method for testing electrical connections between a liquid-crystal display (LCD) panel and external flexible circuit substrates. The invention addresses the inability to visually inspect connections by providing dedicated connection wiring on the panel itself, allowing for electrical resistance measurements to confirm connectivity.

3. Grounds for Unpatentability

Ground 1: Obviousness over Takenaka - Claims 1-7, 11, and 12 are obvious over Takenaka.

  • Prior Art Relied Upon: Takenaka (Application # 2008/0291379).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Takenaka, as a single reference, rendered the claims obvious. Takenaka discloses a liquid-crystal display device designed to stabilize a reference voltage signal by using a "multiplicity of distributed supply paths." Petitioner asserted these paths, including common wires (CW3, CW10) and a common bus line (CBL) formed on the display panel, inherently perform the function of the "first connection wiring" and "second connection wiring" recited in independent claim 1. The petition mapped how these wires in Takenaka connect different terminal portions (corresponding to the first, second, third, and fourth terminals) in the manner required by the claims. Similarly, the flexible boards with semiconductor devices in Takenaka were identified as the claimed "circuit substrates."
    • Key Aspects: The core of this argument was that Takenaka’s wiring, although intended for voltage stabilization, disclosed the exact physical structure claimed in the ’020 patent, making the claimed configuration obvious for any purpose, including testing.

Ground 2: Obviousness over Takenaka and Ito - Claims 8-10 are obvious over Takenaka in view of Ito.

  • Prior Art Relied Upon: Takenaka (Application # 2008/0291379) and Ito (Japanese Application # 2009168877A).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that this combination supplied a key limitation of independent claim 8 not explicitly found in Takenaka: a terminal portion "arranged on a side opposed to a display region with respect to the first terminal portion." While Takenaka provided the base device with the necessary connection wiring schemes (CW3, CBL, etc.), Ito was cited for its disclosure of an overlapping substrate configuration that arranges two rows of panel terminals (102a, 102b) on opposing sides relative to each other, with the display region (10a) on one side. Petitioner contended that applying Ito's terminal layout to Takenaka's device would result in the claimed arrangement.
    • Motivation to Combine: Petitioner asserted a POSITA would combine these references because both were driven by the same market force: improving display quality by increasing terminal density. Both also addressed resulting reliability issues—Takenaka by stabilizing voltage and Ito by offsetting integrated circuits to prevent overheating. Petitioner argued it would have been a simple and obvious design choice to reposition Takenaka's terminals into Ito’s more space-efficient, perpendicular arrangement.
    • Expectation of Success: A POSITA would have had a reasonable expectation of success, as the modification involved a predictable repositioning of known components to achieve a known benefit of accommodating more terminals.

Ground 3: Obviousness over Takemura - Claims 1-7 and 13 are obvious over Takemura.

  • Prior Art Relied Upon: Takemura (Japanese Application # H0643473A).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued Takemura was highly pertinent as it explicitly addressed the same problem as the ’020 patent: checking the quality of terminal connections during manufacturing. Takemura teaches a configuration where terminal groups on an LCD panel have short-circuited terminals at each end. These terminals are connected to external measurement points via flexible substrates (TABs). Petitioner contended that Takemura’s "auxiliary capacitance lines" or alternative "rescue line extending around the display region," which connect these panel terminals, directly correspond to the "connection wiring" of the challenged claims. The petition mapped how Takemura’s short-circuited panel terminals (39) and connecting lines (31) met the limitations of claim 1, including the connections between the first/fourth and second/third terminals.
    • Key Aspects: This ground was presented as particularly strong because Takemura not only discloses the claimed structure but also explicitly teaches using it for the same purpose of electrical connection testing, undermining the ’020 patent’s assertion of novelty.

4. Key Claim Construction Positions

  • "arranged on a side opposed to a display region with respect to the first terminal portion" (Claim 8): Petitioner proposed this term means "arranged on an opposite side of the first terminal portion from the display region." This construction was central to Ground 2, as it clarifies the spatial relationship that Petitioner argued was taught by Ito and could be combined with Takenaka.
  • "connection wiring" (Claims 1, 2, 5, 6, 8, 9, and 11): Petitioner proposed this term should be construed as "circuit path." This broader construction supported Petitioner's arguments that the common lines, bus lines, and auxiliary capacitance lines in the prior art—which are not necessarily physical wires but are patterned conductive traces—meet the claim limitation.

5. Relief Requested

  • Petitioner requests institution of an inter partes review and cancellation of claims 1-13 of Patent 8,391,020 as unpatentable under 35 U.S.C. §103.