PTAB

IPR2026-00024

Generac Power Systems Inc v. J Carl Cooper

Log In
Key Events
Petition
petition

1. Case Identification

2. Patent Overview

  • Title: POWER SOURCE LOAD CONTROL
  • Brief Description: The ’857 patent discloses systems for controlling backup power sources, specifically by managing the AC power frequency in response to the electrical load to prevent overload conditions.

3. Grounds for Unpatentability

Ground 1A: Obviousness over Lasseter-Lopes - Claims 45-47, 49-54, 58-60, and 66-69 are obvious over Lasseter in view of Lopes.

  • Prior Art Relied Upon: Lasseter (Application # 2006/0208574) and Lopes (a May 2006 IEEE journal article).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Lasseter disclosed a distributed energy resource (DER) system with microsources that control power output by adjusting frequency in response to load (a P-ω droop relationship). Lasseter taught that operating beyond a maximum rated power (Pmax) would cause the frequency to drop below a minimum threshold, representing an overload condition. While Lasseter acknowledged that load can exceed generation capacity, it did not detail a responsive strategy. Lopes allegedly supplied this missing element by teaching a control strategy for similar islanded DER systems that used "load shedding strategies" triggered by frequency deviations to manage overloads.
    • Motivation to Combine: A Person of Ordinary Skill in the Art (POSITA) would combine Lopes's responsive load-shedding strategy with Lasseter's system to solve a problem that Lasseter identified but did not fully address: managing situations where the combined generation capacity is insufficient for the total load. Petitioner asserted this combination would improve system reliability and efficiency by implementing a well-known solution (load shedding) for a known problem.
    • Expectation of Success: A POSITA would have a reasonable expectation of success because the combination involved applying a known load-shedding technique (Lopes) to a power control system (Lasseter) that already used frequency as a key control parameter, yielding the predictable result of stable operation during overload events.

Ground 1B: Obviousness over Lasseter-Lopes-Baldassarre - Claims 48, 56-57, and 71 are obvious over the combination of Lasseter, Lopes, and Baldassarre.

  • Prior Art Relied Upon: Lasseter (Application # 2006/0208574), Lopes (a May 2006 IEEE journal article), and Baldassarre (Application # 2010/0019574).
  • Core Argument for this Ground:
    • Prior Art Mapping: Building on the Lasseter-Lopes combination, Petitioner argued Baldassarre taught a processor-based control system with a user interface that allowed users to program load priorities and define sequences for load shedding and reconnection. This directly addressed claim limitations requiring a user interface for selecting load priorities and disconnecting loads for a time period responsive to that priority.
    • Motivation to Combine: A POSITA would add Baldassarre’s teachings to the Lasseter-Lopes system to add desirable user-configurability. While Lasseter-Lopes provided for automatic load shedding, it lacked a method for a user to define which loads are critical and which should be shed first. Baldassarre provided this missing hardware and software structure, allowing for a more sophisticated and user-tailored load management system.
    • Expectation of Success: The combination was asserted to be straightforward and predictable. Integrating Baldassarre's user-programmable interface with the frequency-responsive relays of Lasseter-Lopes was a simple application of known user interface concepts to a load-control system to achieve the predictable result of user-defined prioritization.

Ground 1C: Obviousness over Lasseter-Lopes-Tsukida - Claims 69-70 are obvious over the combination of Lasseter, Lopes, and Tsukida.

  • Prior Art Relied Upon: Lasseter (Application # 2006/0208574), Lopes (a May 2006 IEEE journal article), and Tsukida (Application # 2007/0222294).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Tsukida improved upon the general load-shedding concept of Lopes by teaching a more advanced algorithm. Tsukida's system used an underfrequency detection unit that considered not only frequency drop but also voltage levels and time duration. This allowed the system to distinguish between an overload condition and an "out-of-step" condition, preventing unnecessary load shedding. This addressed claim limitations requiring responsiveness to both frequency and at least one other parameter, such as voltage.
    • Motivation to Combine: A POSITA would incorporate Tsukida's more sophisticated logic into the Lasseter-Lopes system to avoid false positives and improve overall system stability. Where Lopes provided a general strategy, Tsukida supplied a concrete implementation that made the load-shedding process more robust and reliable.
    • Expectation of Success: A POSITA would reasonably expect success because it involved implementing a more advanced but known control algorithm into a system already based on processor control and frequency-responsive load shedding. The result would be a predictable improvement in the system's performance.
  • Additional Grounds: Petitioner asserted an additional obviousness challenge for claim 55 based on the combined teachings of Lasseter, Lopes, Baldassarre, and Tsukida, arguing the references collectively taught all claimed features.

4. Key Claim Construction Positions

  • "Overload": Petitioner argued this term was expressly defined in the ’857 patent as "a load that if not disconnected or otherwise prevented will either cause a departure from specifications for the power output from the power source," such as a deviation in AC voltage or frequency.
  • "Parameter": Petitioner noted this term was defined as "a quantity of one or more property or attribute...which is treated as a constant," with examples including power, voltage, and current.
  • "Known": Petitioner pointed to the patent's definition of "known" as having been "previously stored in a memory and available e.g. having been previously manufactured with, programmed with or measured."

5. Relief Requested

  • Petitioner requests institution of an inter partes review and cancellation of claims 45-71 of the ’857 patent as unpatentable.