PTAB
IPR2025-00997
Samsung Electronics Co Ltd v. W&Wsens Devices Inc
Key Events
Petition
Table of Contents
petition
1. Case Identification
- Case #: IPR2025-00997
- Patent #: 9,525,084
- Filed: July 14, 2025
- Petitioner(s): Samsung Electronics Co., Ltd., Samsung Electronics America, Inc., Samsung Semiconductor, Inc., and Samsung Austin Semiconductor LLC
- Patent Owner(s): W&WSENS Devices Inc.
- Challenged Claims: 1-9, 11-15, 17-21, and 24
2. Patent Overview
- Title: Integrated Photodetector and Processor Circuit
- Brief Description: The ’084 patent discloses an integrated, single-chip device containing both a photodetector and an electronic processor on a single semiconductor substrate. The core technology is a microstructure-enhanced photodetector that features a plurality of holes etched into its photo-absorption layer to increase light absorption efficiency.
3. Grounds for Unpatentability
Ground 1: Obviousness over Harada and Hasegawa - Claims 1-9, 11-15, 17-21, and 24 are obvious over Harada in view of Hasegawa.
- Prior Art Relied Upon: Harada (Japanese Application # JP2002-314116A) and Hasegawa (Japanese Application # JP2007-129024A).
- Core Argument for this Ground:
- Prior Art Mapping: Petitioner argued that Harada discloses the core photodetector technology: a PiN photodiode with a plurality of holes in its light-receiving surface to improve light-receiving sensitivity and response speed. Harada teaches that these holes enhance absorption. Hasegawa discloses the integration concept: a single semiconductor chip that includes both PiN photodiodes and signal-processing circuits (e.g., CMOS devices) formed on the same substrate for high-speed optical data communication. Petitioner asserted that the combination of Harada’s microstructure-enhanced photodiode with Hasegawa’s integrated single-chip architecture discloses the limitations of independent claims 1, 11, and 17. For example, the combined art taught an integrated circuit (Hasegawa) with a photodetector having microstructure-enhanced photoabsorption (Harada) and an electronic processor (Hasegawa) on a single chip. Dependent claims were allegedly met by specific disclosures in the references, such as Harada’s disclosure of i-layer thickness dimensions meeting the range of claim 2 and Hasegawa’s disclosure of CMOS devices for the processor of claim 3.
- Motivation to Combine: A Person of Ordinary Skill in the Art (POSITA) would combine Harada and Hasegawa to gain the known benefits of both technologies. Specifically, a POSITA would incorporate Harada's high-sensitivity photodiode into Hasegawa’s integrated single-chip design to create a more compact, reliable, and lower-cost device with improved performance for high-speed optical data communication. Integrating the components on a single substrate, as taught by Hasegawa, was a well-understood method to reduce noise, power consumption, and manufacturing costs while increasing data speeds.
- Expectation of Success: A POSITA would have a reasonable expectation of success because both references describe silicon-based PiN photodiodes fabricated using compatible CMOS processes. The combination involved applying known integration techniques (from Hasegawa) to a known type of enhanced photodiode (from Harada) to achieve predictable improvements in performance and form factor.
Ground 2: Obviousness over Harada, Hasegawa, and NXP - Claim 7 is obvious over Harada and Hasegawa in view of NXP.
- Prior Art Relied Upon: Harada (Japanese Application # JP2002-314116A), Hasegawa (Japanese Application # JP2007-129024A), and NXP (European Application # EP 2 172 974 A1).
- Core Argument for this Ground:
- Prior Art Mapping: This ground builds on the Harada-Hasegawa combination, which Petitioner asserted already teaches an integrated circuit with multiple photodetectors. The key limitation in claim 7 is the photon absorbing regions "receiving respective additional source signals." Petitioner argued NXP provides the teaching to satisfy this limitation by disclosing an array of photodiodes where the dimensions of the pores (holes) in each diode are varied. This variation makes each photodiode sensitive to a different target wavelength.
- Motivation to Combine: A POSITA would modify the Harada-Hasegawa device with NXP’s teachings to expand its functionality to include wavelength division multiplexing (WDM). NXP explicitly teaches that varying hole dimensions allows for the detection of different wavelengths. Applying this known technique would enable the combined device to simultaneously receive multiple, separate data channels on different wavelengths, thereby increasing data bandwidth and speed, a known goal in optical communications.
- Expectation of Success: Success was reasonably expected as NXP, like Harada and Hasegawa, discloses silicon photodiodes and CMOS-compatible fabrication processes. The modification simply involved applying NXP’s known technique of forming different-sized holes to the array of photodiodes already present in the Harada-Hasegawa combination.
Ground 3: Obviousness over Harada, Hasegawa, and Yahaya - Claims 5 and 14 are obvious over Harada and Hasegawa in view of Yahaya.
- Prior Art Relied Upon: Harada (Japanese Application # JP2002-314116A), Hasegawa (Japanese Application # JP2007-129024A), and Yahaya (a 2013 journal article).
- Core Argument for this Ground:
- Prior Art Mapping: This ground addresses the specific absorption performance recited in claims 5 and 14: an absorption percentage that varies by less than 20% over a specified wavelength span (800 nm to 900 nm). Petitioner contended that while the Harada-Hasegawa combination provides the basic structure, Yahaya provides explicit experimental data demonstrating that silicon photodetectors with periodic nanohole arrays achieve this exact performance characteristic. Yahaya shows absorption levels of ~78-95% (a variation of less than 20%) between 800-900 nm.
- Motivation to Combine: A POSITA would have been motivated to modify the hole dimensions of the Harada-Hasegawa photodiode based on Yahaya’s teachings to achieve more reliable and consistent performance across the target wavelength range. Yahaya demonstrates that optimizing hole dimensions was a known method for achieving consistent, high absorption, which is a desirable characteristic for any high-speed photodetector.
- Expectation of Success: A POSITA would have expected success because Yahaya’s teachings are directly applicable to the silicon photodetectors with holes disclosed in Harada. The modification would only require altering the known hole dimensions to match those taught by Yahaya to achieve the predictable result of flatter, more consistent absorption performance.
4. Relief Requested
- Petitioner requests institution of an inter partes review and cancellation of claims 1-9, 11-15, 17-21, and 24 of Patent 9,525,084 as unpatentable.
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